Commit feeef118 authored by Robert Marko's avatar Robert Marko Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: ipq6018: move ARMv8 timer out of SoC node 



The ARM timer is usually considered not part of SoC node, just like
other ARM designed blocks (PMU, PSCI).  This fixes dtbs_check warning:

arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'}
	From schema: dtschema/schemas/simple-bus.yaml

Signed-off-by: default avatarRobert Marko <robimarko@gmail.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220927201218.1264506-2-robimarko@gmail.com
parent 8857b0ab

arch/arm64/boot/dts/qcom/ipq6018.dtsi

+8 −8
Original line number Diff line number Diff line
@@ -511,14 +511,6 @@ a53pll: clock@b116000 { 
			clock-names = "xo";

		};



		timer {

			compatible = "arm,armv8-timer";

			interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

				     <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

				     <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

				     <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;

		};



		timer@b120000 {

			#address-cells = <1>;

			#size-cells = <1>;
@@ -770,6 +762,14 @@ dwc_0: usb@8a00000 { 
		};

	};



	timer {

		compatible = "arm,armv8-timer";

		interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;

	};



	wcss: wcss-smp2p {

		compatible = "qcom,smp2p";

		qcom,smem = <435>, <428>;