Commits · 166e4b4841974465d73d650468895b725023c81e · jan.koester / Linux · GitLab

Jun 01, 2020
- Merge branches 'clk-vc5', 'clk-hsdk', 'clk-mediatek' and 'clk-baikal' into clk-next · 166e4b48
  Stephen Boyd authored Jun 01, 2020
  166e4b48
- Merge branches 'clk-mmp', 'clk-intel', 'clk-ingenic', 'clk-qcom' and 'clk-silabs' into clk-next · 5debcd01
  Stephen Boyd authored Jun 01, 2020
  5debcd01
- Merge branches 'clk-unisoc', 'clk-trivial', 'clk-bcm', 'clk-st' and 'clk-ast2600' into clk-next · b6f3162d
  Stephen Boyd authored Jun 01, 2020
  b6f3162d
- Merge branches 'clk-tegra', 'clk-imx', 'clk-zynq', 'clk-socfpga', 'clk-at91'... · 8c88e568
  Stephen Boyd authored Jun 01, 2020
  8c88e568
- Merge branches 'clk-selectable', 'clk-amlogic', 'clk-renesas', 'clk-samsung'... · 3a57530b
  Stephen Boyd authored Jun 01, 2020
  3a57530b
May 30, 2020
- dt: Add bindings for IDT VersaClock 5P49V5925 · d63ed4ff
  Adam Ford authored Apr 04, 2020
  d63ed4ff
- clk: vc5: Add support for IDT VersaClock 5P49V6965 · 2bda748e
  Adam Ford authored Apr 04, 2020
  2bda748e
- clk: Add Baikal-T1 CCU Dividers driver · 353afa3a
  Serge Semin authored May 27, 2020
  353afa3a
- clk: Add Baikal-T1 CCU PLLs driver · b7d950b9
  Serge Semin authored May 27, 2020
  b7d950b9
- dt-bindings: clk: Add Baikal-T1 CCU Dividers binding · 11ea09b9
  Serge Semin authored May 27, 2020
  11ea09b9
- dt-bindings: clk: Add Baikal-T1 CCU PLLs binding · aec6adc5
  Serge Semin authored May 27, 2020
  aec6adc5
May 29, 2020
- clk: mediatek: assign the initial value to clk_init_data of mtk_mux · 571cfadc
  Weiyi Lu authored May 27, 2020
  571cfadc
- clk: mediatek: Add MT6765 clock support · 1aca9939
  Owen Chen authored Feb 21, 2020
  1aca9939
- clk: mediatek: add mt6765 clock IDs · eb7beb65
  Mars Cheng authored Feb 21, 2020
  eb7beb65
- dt-bindings: clock: mediatek: document clk bindings vcodecsys for Mediatek MT6765 SoC · 0502f26c
  Macpaul Lin authored Feb 21, 2020
  0502f26c
- dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT6765 SoC · 626b134b
  Macpaul Lin authored Feb 21, 2020
  626b134b
- dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoC · 7b9e111a
  Macpaul Lin authored Feb 21, 2020
  7b9e111a
- CLK: HSDK: CGU: add support for 148.5MHz clock · 56fbeefe
  Eugeniy Paltsev authored Mar 11, 2020
  56fbeefe
- CLK: HSDK: CGU: support PLL bypassing · 423f042a
  Eugeniy Paltsev authored Mar 11, 2020
  423f042a
- CLK: HSDK: CGU: check if PLL is bypassed first · 907f9291
  Eugeniy Paltsev authored Mar 11, 2020
  907f9291
- clk: clk-si5341: Add support for the Si5345 series · f9eec2ea
  Mike Looijmans authored May 07, 2020
  f9eec2ea
May 28, 2020
- clk: qcom: Add missing msm8998 ufs_unipro_core_clk_src · b1e8d713
  Jeffrey Hugo authored May 28, 2020
  b1e8d713
- clk: ingenic: Mark ingenic_tcu_of_match as __maybe_unused · e480fe10
  Stephen Boyd authored May 28, 2020
  e480fe10
- clk: X1000: Add FIXDIV for SSI clock of X1000. · 440d7a6f
  周琰杰 (Zhou Yanjie) authored May 28, 2020
  440d7a6f
- dt-bindings: clock: Add and reorder ABI for X1000. · 424c85e1
  周琰杰 (Zhou Yanjie) authored May 28, 2020
  424c85e1
- clk: Ingenic: Add CGU driver for X1830. · ce1d86dc
  周琰杰 (Zhou Yanjie) authored May 28, 2020
  ce1d86dc
- dt-bindings: clock: Add X1830 clock bindings. · 9a618e6f
  周琰杰 (Zhou Yanjie) authored May 28, 2020
  9a618e6f
- clk: Ingenic: Adjust cgu code to make it compatible with X1830. · 9d9cc58a
  周琰杰 (Zhou Yanjie) authored May 28, 2020
  9d9cc58a
- clk: Ingenic: Remove unnecessary spinlock when reading registers. · 15e3ae36
  周琰杰 (Zhou Yanjie) authored May 28, 2020
  15e3ae36
- clk: intel: remove redundant initialization of variable rate64 · d0364663
  Colin Ian King authored May 28, 2020
  d0364663
- clk: mmp2: Add audio clock controller driver · 725262d2
  Lubomir Rintel authored May 20, 2020
  725262d2
- dt-bindings: clock: Add Marvell MMP Audio Clock Controller binding · e787c5b7
  Lubomir Rintel authored May 20, 2020
  e787c5b7
- clk: mmp2: Add support for power islands · ee4df236
  Lubomir Rintel authored May 20, 2020
  ee4df236
- dt-bindings: marvell,mmp2: Add ids for the power domains · 17d43046
  Lubomir Rintel authored May 20, 2020
  17d43046
- dt-bindings: clock: Make marvell,mmp2-clock a power controller · ec6bbdde
  Lubomir Rintel authored May 20, 2020
  ec6bbdde
- clk: mmp2: Add the audio clock · 232a3134
  Lubomir Rintel authored May 20, 2020
  232a3134
- clk: mmp2: Add the I2S clocks · 71d8254a
  Lubomir Rintel authored May 20, 2020
  71d8254a
- clk: mmp2: Rename mmp2_pll_init() to mmp2_main_clk_init() · 2766c198
  Lubomir Rintel authored May 20, 2020
  2766c198
- clk: mmp2: Move thermal register defines up a bit · 8c2427b8
  Lubomir Rintel authored May 20, 2020
  8c2427b8
- dt-bindings: marvell,mmp2: Add clock id for the Audio clock · c227df7a
  Lubomir Rintel authored May 20, 2020
  c227df7a