Commits · 513b67ac39b0ef91761d94d1d6e31bb84e380744 · jan.koester / Linux · GitLab

Mar 13, 2018
- clk: meson: add mpll pre-divider · 513b67ac
  Jerome Brunet authored Feb 19, 2018
  513b67ac
- clk: meson: axg: add hifi pll clock · 093c3fac
  Jerome Brunet authored Feb 19, 2018
  093c3fac
- clk: meson: axg: add hifi clock bindings · a4fb7df2
  Jerome Brunet authored Feb 19, 2018
  a4fb7df2
- clk: meson: add ROUND_CLOSEST to the pll driver · 0a1be867
  Jerome Brunet authored Feb 19, 2018
  0a1be867
- clk: meson: add gp0 frac parameter for axg and gxl · c77de0e5
  Jerome Brunet authored Feb 19, 2018
  c77de0e5
- clk: meson: improve pll driver results with frac · 8289aafa
  Jerome Brunet authored Feb 19, 2018
  8289aafa
- clk: meson: remove special gp0 lock loop · c178b003
  Jerome Brunet authored Feb 19, 2018
  c178b003
- clk: meson: poke pll CNTL last · 117863e8
  Jerome Brunet authored Feb 19, 2018
  117863e8
- clk: meson: add fractional part of meson8b fixed_pll · 2eab2d7c
  Jerome Brunet authored Feb 19, 2018
  2eab2d7c
- clk: meson: use hhi syscon if available · 4162dd5b
  Jerome Brunet authored Feb 12, 2018
  4162dd5b
- clk: meson: remove obsolete cpu_clk · 03a6519e
  Jerome Brunet authored Feb 12, 2018
  03a6519e
- clk: meson: rework meson8b cpu clock · 251b6fd3
  Jerome Brunet authored Feb 12, 2018
  251b6fd3
- clk: meson: split divider and gate part of mpll · d610b54f
  Jerome Brunet authored Feb 12, 2018
  d610b54f
- clk: meson: migrate plls clocks to clk_regmap · 722825dc
  Jerome Brunet authored Feb 12, 2018
  722825dc
- clk: meson: migrate the audio divider clock to clk_regmap · 88a4e128
  Jerome Brunet authored Feb 12, 2018
  88a4e128
- clk: meson: migrate mplls clocks to clk_regmap · c763e61a
  Jerome Brunet authored Feb 12, 2018
  c763e61a
- clk: meson: add regmap helpers for parm · f510c32a
  Jerome Brunet authored Feb 12, 2018
  f510c32a
- clk: meson: migrate muxes to clk_regmap · 2513a28c
  Jerome Brunet authored Feb 12, 2018
  2513a28c
- clk: meson: migrate dividers to clk_regmap · f06ddd28
  Jerome Brunet authored Feb 12, 2018
  f06ddd28
- clk: meson: migrate gates to clk_regmap · 7f9768a5
  Jerome Brunet authored Feb 12, 2018
  7f9768a5
- clk: meson: add regmap to the clock controllers · 161f6e5b
  Jerome Brunet authored Feb 12, 2018
  161f6e5b
- clk: meson: remove superseded aoclk_gate_regmap · 1f932d99
  Jerome Brunet authored Feb 12, 2018
  1f932d99
- clk: meson: switch gxbb ao_clk to clk_regmap · 81c7fcac
  Jerome Brunet authored Feb 12, 2018
  81c7fcac
- clk: meson: add regmap clocks · ea11dda9
  Jerome Brunet authored Feb 12, 2018
  ea11dda9
- clk: meson: remove obsolete comments · 7b174c5e
  Jerome Brunet authored Feb 12, 2018
  7b174c5e
- clk: meson: only one loop index is necessary in probe · 14bd7b9c
  Jerome Brunet authored Feb 12, 2018
  14bd7b9c
- clk: meson: use devm_of_clk_add_hw_provider · 332b32a2
  Jerome Brunet authored Feb 12, 2018
  332b32a2
- clk: meson: use dev pointer where possible · 323346d3
  Jerome Brunet authored Feb 12, 2018
  323346d3
- Merge branch 'topic/pll-fixes' into next/drivers · 867a5a12
  Neil Armstrong authored Mar 13, 2018
  
  867a5a12
Mar 12, 2018
- clk: qcom: use divider_ro_round_rate helper · f5edaefe
  Jerome Brunet authored Feb 14, 2018
  f5edaefe
- clk: divider: read-only divider can propagate rate change · b15ee490
  Jerome Brunet authored Feb 14, 2018
  b15ee490
- clk: fix mux clock documentation · fe3f338f
  Jerome Brunet authored Feb 14, 2018
  fe3f338f
- clk: call the clock init() callback before any other ops callback · 541debae
  Jerome Brunet authored Feb 14, 2018
  541debae
- clk: mux: add helper function for index/value translation · 77deb66d
  Jerome Brunet authored Feb 14, 2018
  77deb66d
- clk: divider: export clk_div_mask() helper · e6d3cc7b
  Jerome Brunet authored Feb 14, 2018
  e6d3cc7b
- clk: fix determine rate error with pass-through clock · 04bf9ab3
  Jerome Brunet authored Feb 14, 2018
  04bf9ab3
- clk: migrate the count of orphaned clocks at init · 99652a46
  Jerome Brunet authored Feb 14, 2018
  99652a46
Feb 12, 2018
- clk: meson: add axg misc bit to the mpll driver · 6c00e7b7
  Jerome Brunet authored Jan 19, 2018
  6c00e7b7
- clk: meson: axg: fix the od shift of the sys_pll · 2fa9b361
  Yixun Lan authored Jan 19, 2018
  2fa9b361
- clk: meson: axg: add the fractional part of the fixed_pll · 6b71acec
  Jerome Brunet authored Jan 19, 2018
  6b71acec