Unverified Commit 0ea23660 authored by Richard Fitzgerald's avatar Richard Fitzgerald Committed by Mark Brown
Browse files

ASoC: cs42l42: Wait at least 150us after writing SCLK_PRESENT 



There must be a delay of at least 150us after writing SCLK_PRESENT
before issuing another I2C write.

This is done using struct reg_sequence because it can specify a delay
after the write and the whole sequence is written atomically.

Signed-off-by: default avatarRichard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: default avatarLucas Tanure <tanureal@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20210306185553.62053-14-tanureal@opensource.cirrus.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 2cdba9b0

sound/soc/codecs/cs42l42.c

+22 −5
Original line number Diff line number Diff line
@@ -549,6 +549,24 @@ static const struct snd_soc_component_driver soc_component_dev_cs42l42 = { 
	.non_legacy_dai_naming	= 1,

};



/* Switch to SCLK. Atomic delay after the write to allow the switch to complete. */

static const struct reg_sequence cs42l42_to_sclk_seq[] = {

	{

		.reg = CS42L42_OSC_SWITCH,

		.def = CS42L42_SCLK_PRESENT_MASK,

		.delay_us = CS42L42_CLOCK_SWITCH_DELAY_US,

	},

};



/* Switch to OSC. Atomic delay after the write to allow the switch to complete. */

static const struct reg_sequence cs42l42_to_osc_seq[] = {

	{

		.reg = CS42L42_OSC_SWITCH,

		.def = 0,

		.delay_us = CS42L42_CLOCK_SWITCH_DELAY_US,

	},

};



struct cs42l42_pll_params {

	u32 sclk;

	u8 mclk_div;
@@ -861,8 +879,8 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream) 
			 * SCLK must remain running until after this clock switch.

			 * Without a source of clock the I2C bus doesn't work.

			 */

			snd_soc_component_update_bits(component, CS42L42_OSC_SWITCH,

						      CS42L42_SCLK_PRESENT_MASK, 0);

			regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_osc_seq,

					       ARRAY_SIZE(cs42l42_to_osc_seq));

			snd_soc_component_update_bits(component, CS42L42_PLL_CTL1,

						      CS42L42_PLL_START_MASK, 0);

		}
@@ -873,9 +891,8 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream) 
						      CS42L42_PLL_START_MASK, 1);



			/* Mark SCLK as present, turn off internal oscillator */

			snd_soc_component_update_bits(component, CS42L42_OSC_SWITCH,

						      CS42L42_SCLK_PRESENT_MASK,

						      CS42L42_SCLK_PRESENT_MASK);

			regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_sclk_seq,

					       ARRAY_SIZE(cs42l42_to_sclk_seq));

		}

		cs42l42->stream_use |= 1 << stream;

sound/soc/codecs/cs42l42.h

+1 −0
Original line number Diff line number Diff line
@@ -755,6 +755,7 @@ 


#define CS42L42_NUM_SUPPLIES	5

#define CS42L42_BOOT_TIME_US	3000

#define CS42L42_CLOCK_SWITCH_DELAY_US 150



static const char *const cs42l42_supply_names[CS42L42_NUM_SUPPLIES] = {

	"VA",