perf_counter: powerpc: Implement generalized cache events for POWER processors
This adds tables of event codes for the generalized cache events for all the currently supported powerpc processors: POWER{4,5,5+,6,7} and PPC970*, plus powerpc-specific code to use these tables when a generalized cache event is requested. Signed-off-by:Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <18992.36430.933526.742969@drongo.ozlabs.ibm.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- arch/powerpc/include/asm/perf_counter.h 3 additions, 0 deletionsarch/powerpc/include/asm/perf_counter.h
- arch/powerpc/kernel/perf_counter.c 40 additions, 2 deletionsarch/powerpc/kernel/perf_counter.c
- arch/powerpc/kernel/power4-pmu.c 41 additions, 0 deletionsarch/powerpc/kernel/power4-pmu.c
- arch/powerpc/kernel/power5+-pmu.c 43 additions, 2 deletionsarch/powerpc/kernel/power5+-pmu.c
- arch/powerpc/kernel/power5-pmu.c 41 additions, 0 deletionsarch/powerpc/kernel/power5-pmu.c
- arch/powerpc/kernel/power6-pmu.c 44 additions, 2 deletionsarch/powerpc/kernel/power6-pmu.c
- arch/powerpc/kernel/power7-pmu.c 41 additions, 0 deletionsarch/powerpc/kernel/power7-pmu.c
- arch/powerpc/kernel/ppc970-pmu.c 41 additions, 0 deletionsarch/powerpc/kernel/ppc970-pmu.c
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