Commit 20fd2ed1 authored by Will Deacon's avatar Will Deacon
Browse files

Merge branch 'for-next/mm' into for-next/core 

* for-next/mm:
  Documentation: vmcoreinfo: Fix htmldocs warning
  arm64/mm: Drop use_1G_block()
  arm64: avoid flushing icache multiple times on contiguous HugeTLB
  arm64: crash_core: Export MODULES, VMALLOC, and VMEMMAP ranges
  arm64/hugetlb: Define __hugetlb_valid_size()
  arm64/mm: avoid fixmap race condition when create pud mapping
  arm64/mm: Consolidate TCR_EL1 fields
parents b3ea0eaf 3c3dd2c8

Documentation/admin-guide/kdump/vmcoreinfo.rst

+8 −0
Original line number Diff line number Diff line
@@ -494,6 +494,14 @@ architecture which is used to lookup the page-tables for the Virtual 
addresses in the higher VA range (refer to ARMv8 ARM document for

more details).



MODULES_VADDR|MODULES_END|VMALLOC_START|VMALLOC_END|VMEMMAP_START|VMEMMAP_END

-----------------------------------------------------------------------------



Used to get the correct ranges:

	MODULES_VADDR ~ MODULES_END-1 : Kernel module space.

	VMALLOC_START ~ VMALLOC_END-1 : vmalloc() / ioremap() space.

	VMEMMAP_START ~ VMEMMAP_END-1 : vmemmap region, used for struct page array.



arm

===

arch/arm64/include/asm/pgtable-hwdef.h

+2 −0
Original line number Diff line number Diff line
@@ -273,6 +273,8 @@ 
#define TCR_NFD1		(UL(1) << 54)

#define TCR_E0PD0		(UL(1) << 55)

#define TCR_E0PD1		(UL(1) << 56)

#define TCR_TCMA0		(UL(1) << 57)

#define TCR_TCMA1		(UL(1) << 58)



/*

 * TTBR.

arch/arm64/include/asm/sysreg.h

+0 −4
Original line number Diff line number Diff line
@@ -1101,10 +1101,6 @@ 
#define CPACR_EL1_ZEN_EL0EN	(BIT(17)) /* enable EL0 access, if EL1EN set */

#define CPACR_EL1_ZEN		(CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN)



/* TCR EL1 Bit Definitions */

#define SYS_TCR_EL1_TCMA1	(BIT(58))

#define SYS_TCR_EL1_TCMA0	(BIT(57))



/* GCR_EL1 Definitions */

#define SYS_GCR_EL1_RRND	(BIT(16))

#define SYS_GCR_EL1_EXCL_MASK	0xffffUL

arch/arm64/kernel/crash_core.c

+6 −0
Original line number Diff line number Diff line
@@ -20,6 +20,12 @@ void arch_crash_save_vmcoreinfo(void) 
{

	VMCOREINFO_NUMBER(VA_BITS);

	/* Please note VMCOREINFO_NUMBER() uses "%d", not "%x" */

	vmcoreinfo_append_str("NUMBER(MODULES_VADDR)=0x%lx\n", MODULES_VADDR);

	vmcoreinfo_append_str("NUMBER(MODULES_END)=0x%lx\n", MODULES_END);

	vmcoreinfo_append_str("NUMBER(VMALLOC_START)=0x%lx\n", VMALLOC_START);

	vmcoreinfo_append_str("NUMBER(VMALLOC_END)=0x%lx\n", VMALLOC_END);

	vmcoreinfo_append_str("NUMBER(VMEMMAP_START)=0x%lx\n", VMEMMAP_START);

	vmcoreinfo_append_str("NUMBER(VMEMMAP_END)=0x%lx\n", VMEMMAP_END);

	vmcoreinfo_append_str("NUMBER(kimage_voffset)=0x%llx\n",

						kimage_voffset);

	vmcoreinfo_append_str("NUMBER(PHYS_OFFSET)=0x%llx\n",

arch/arm64/mm/flush.c

+7 −0
Original line number Diff line number Diff line
@@ -52,6 +52,13 @@ void __sync_icache_dcache(pte_t pte) 
{

	struct page *page = pte_page(pte);



	/*

	 * HugeTLB pages are always fully mapped, so only setting head page's

	 * PG_dcache_clean flag is enough.

	 */

	if (PageHuge(page))

		page = compound_head(page);



	if (!test_bit(PG_dcache_clean, &page->flags)) {

		sync_icache_aliases((unsigned long)page_address(page),

				    (unsigned long)page_address(page) +