Commit 2ff3cf82 authored by Roman Li's avatar Roman Li Committed by Alex Deucher
Browse files

drm/amd/display: Fix hangs with psr enabled on dcn3.xx 



[Why]
SKIP_CRTC_DISABLE bit should be applicable to all dcn asics
not only Raven.

[How]
Replace check for Raven only with check for all DCNs.

Signed-off-by: default avatarRoman Li <Roman.Li@amd.com>
Acked-by: default avatarBindu Ramamurthy <bindur12@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e922057b

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+1 −4
Original line number Diff line number Diff line
@@ -2813,12 +2813,9 @@ bool dc_link_setup_psr(struct dc_link *link, 


	psr_context->psr_level.u32all = 0;



#if defined(CONFIG_DRM_AMD_DC_DCN)

	/*skip power down the single pipe since it blocks the cstate*/

	if ((link->ctx->asic_id.chip_family == FAMILY_RV) &&

	     ASICREV_IS_RAVEN(link->ctx->asic_id.hw_internal_rev))

	if (link->ctx->asic_id.chip_family >= FAMILY_RV)

		psr_context->psr_level.bits.SKIP_CRTC_DISABLE = true;

#endif



	/* SMU will perform additional powerdown sequence.

	 * For unsupported ASICs, set psr_level flag to skip PSR