Skip to content
Commit 32aa77a4 authored by Alexander Duyck's avatar Alexander Duyck Committed by Jeff Kirsher
Browse files

ixgbe: change vector numbering so that queues end up on correct CPUs



This changes the numbering scheme slightly. Previously the ordering was
coming out like this:
Rx-2
Rx-1
Rx-0
TxRx-0
Which would drop two queues on CPU 0. This change makes it so that the
ordering is like this:
Rx-3
Rx-2
Rx-1
TxRx-0
This means that each CPU will have it's own Rx queue, and only CPU 0 will
have the Tx queue.

Signed-off-by: default avatarAlexander Duyck <alexander.h.duyck@intel.com>
Tested-by: default avatarRoss Brattain <ross.b.brattain@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent b953799e
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment