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jan.koester
Linux
Commits
36fd3609
Commit
36fd3609
authored
3 years ago
by
Rafael J. Wysocki
Browse files
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Merge back earlier power capping changes for v5.17
parents
b8470e98
86ffed3d
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3 changed files
drivers/powercap/idle_inject.c
+1
-1
1 addition, 1 deletion
drivers/powercap/idle_inject.c
drivers/powercap/intel_rapl_common.c
+59
-2
59 additions, 2 deletions
drivers/powercap/intel_rapl_common.c
include/linux/intel_rapl.h
+6
-0
6 additions, 0 deletions
include/linux/intel_rapl.h
with
66 additions
and
3 deletions
drivers/powercap/idle_inject.c
+
1
−
1
View file @
36fd3609
...
...
@@ -12,7 +12,7 @@
*
* All of the kthreads used for idle injection are created at init time.
*
* Next, the users of the
the
idle injection framework provide a cpumask via
* Next, the users of the idle injection framework provide a cpumask via
* its register function. The kthreads will be synchronized with respect to
* this cpumask.
*
...
...
This diff is collapsed.
Click to expand it.
drivers/powercap/intel_rapl_common.c
+
59
−
2
View file @
36fd3609
...
...
@@ -61,6 +61,20 @@
#define PERF_STATUS_THROTTLE_TIME_MASK 0xffffffff
#define PP_POLICY_MASK 0x1F
/*
* SPR has different layout for Psys Domain PowerLimit registers.
* There are 17 bits of PL1 and PL2 instead of 15 bits.
* The Enable bits and TimeWindow bits are also shifted as a result.
*/
#define PSYS_POWER_LIMIT1_MASK 0x1FFFF
#define PSYS_POWER_LIMIT1_ENABLE BIT(17)
#define PSYS_POWER_LIMIT2_MASK (0x1FFFFULL<<32)
#define PSYS_POWER_LIMIT2_ENABLE BIT_ULL(49)
#define PSYS_TIME_WINDOW1_MASK (0x7FULL<<19)
#define PSYS_TIME_WINDOW2_MASK (0x7FULL<<51)
/* Non HW constants */
#define RAPL_PRIMITIVE_DERIVED BIT(1)
/* not from raw data */
#define RAPL_PRIMITIVE_DUMMY BIT(2)
...
...
@@ -97,6 +111,7 @@ struct rapl_defaults {
bool
to_raw
);
unsigned
int
dram_domain_energy_unit
;
unsigned
int
psys_domain_energy_unit
;
bool
spr_psys_bits
;
};
static
struct
rapl_defaults
*
rapl_defaults
;
...
...
@@ -669,12 +684,51 @@ static struct rapl_primitive_info rpi[] = {
RAPL_DOMAIN_REG_PERF
,
TIME_UNIT
,
0
),
PRIMITIVE_INFO_INIT
(
PRIORITY_LEVEL
,
PP_POLICY_MASK
,
0
,
RAPL_DOMAIN_REG_POLICY
,
ARBITRARY_UNIT
,
0
),
PRIMITIVE_INFO_INIT
(
PSYS_POWER_LIMIT1
,
PSYS_POWER_LIMIT1_MASK
,
0
,
RAPL_DOMAIN_REG_LIMIT
,
POWER_UNIT
,
0
),
PRIMITIVE_INFO_INIT
(
PSYS_POWER_LIMIT2
,
PSYS_POWER_LIMIT2_MASK
,
32
,
RAPL_DOMAIN_REG_LIMIT
,
POWER_UNIT
,
0
),
PRIMITIVE_INFO_INIT
(
PSYS_PL1_ENABLE
,
PSYS_POWER_LIMIT1_ENABLE
,
17
,
RAPL_DOMAIN_REG_LIMIT
,
ARBITRARY_UNIT
,
0
),
PRIMITIVE_INFO_INIT
(
PSYS_PL2_ENABLE
,
PSYS_POWER_LIMIT2_ENABLE
,
49
,
RAPL_DOMAIN_REG_LIMIT
,
ARBITRARY_UNIT
,
0
),
PRIMITIVE_INFO_INIT
(
PSYS_TIME_WINDOW1
,
PSYS_TIME_WINDOW1_MASK
,
19
,
RAPL_DOMAIN_REG_LIMIT
,
TIME_UNIT
,
0
),
PRIMITIVE_INFO_INIT
(
PSYS_TIME_WINDOW2
,
PSYS_TIME_WINDOW2_MASK
,
51
,
RAPL_DOMAIN_REG_LIMIT
,
TIME_UNIT
,
0
),
/* non-hardware */
PRIMITIVE_INFO_INIT
(
AVERAGE_POWER
,
0
,
0
,
0
,
POWER_UNIT
,
RAPL_PRIMITIVE_DERIVED
),
{
NULL
,
0
,
0
,
0
},
};
static
enum
rapl_primitives
prim_fixups
(
struct
rapl_domain
*
rd
,
enum
rapl_primitives
prim
)
{
if
(
!
rapl_defaults
->
spr_psys_bits
)
return
prim
;
if
(
rd
->
id
!=
RAPL_DOMAIN_PLATFORM
)
return
prim
;
switch
(
prim
)
{
case
POWER_LIMIT1
:
return
PSYS_POWER_LIMIT1
;
case
POWER_LIMIT2
:
return
PSYS_POWER_LIMIT2
;
case
PL1_ENABLE
:
return
PSYS_PL1_ENABLE
;
case
PL2_ENABLE
:
return
PSYS_PL2_ENABLE
;
case
TIME_WINDOW1
:
return
PSYS_TIME_WINDOW1
;
case
TIME_WINDOW2
:
return
PSYS_TIME_WINDOW2
;
default:
return
prim
;
}
}
/* Read primitive data based on its related struct rapl_primitive_info.
* if xlate flag is set, return translated data based on data units, i.e.
* time, energy, and power.
...
...
@@ -692,7 +746,8 @@ static int rapl_read_data_raw(struct rapl_domain *rd,
enum
rapl_primitives
prim
,
bool
xlate
,
u64
*
data
)
{
u64
value
;
struct
rapl_primitive_info
*
rp
=
&
rpi
[
prim
];
enum
rapl_primitives
prim_fixed
=
prim_fixups
(
rd
,
prim
);
struct
rapl_primitive_info
*
rp
=
&
rpi
[
prim_fixed
];
struct
reg_action
ra
;
int
cpu
;
...
...
@@ -738,7 +793,8 @@ static int rapl_write_data_raw(struct rapl_domain *rd,
enum
rapl_primitives
prim
,
unsigned
long
long
value
)
{
struct
rapl_primitive_info
*
rp
=
&
rpi
[
prim
];
enum
rapl_primitives
prim_fixed
=
prim_fixups
(
rd
,
prim
);
struct
rapl_primitive_info
*
rp
=
&
rpi
[
prim_fixed
];
int
cpu
;
u64
bits
;
struct
reg_action
ra
;
...
...
@@ -981,6 +1037,7 @@ static const struct rapl_defaults rapl_defaults_spr_server = {
.
compute_time_window
=
rapl_compute_time_window_core
,
.
dram_domain_energy_unit
=
15300
,
.
psys_domain_energy_unit
=
1000000000
,
.
spr_psys_bits
=
true
,
};
static
const
struct
rapl_defaults
rapl_defaults_byt
=
{
...
...
This diff is collapsed.
Click to expand it.
include/linux/intel_rapl.h
+
6
−
0
View file @
36fd3609
...
...
@@ -58,6 +58,12 @@ enum rapl_primitives {
THROTTLED_TIME
,
PRIORITY_LEVEL
,
PSYS_POWER_LIMIT1
,
PSYS_POWER_LIMIT2
,
PSYS_PL1_ENABLE
,
PSYS_PL2_ENABLE
,
PSYS_TIME_WINDOW1
,
PSYS_TIME_WINDOW2
,
/* below are not raw primitive data */
AVERAGE_POWER
,
NR_RAPL_PRIMITIVES
,
...
...
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