Commit 47547c56 authored by Martin Leung's avatar Martin Leung Committed by Alex Deucher
Browse files

drm/amd/display: Undo ODM combine 



Undo ODM Combine regression causing causing pipe allocation issues.

Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: default avatarAric Cyr <Aric.Cyr@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarMartin Leung <Martin.Leung@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2ca6c483

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+21 −60
Original line number Diff line number Diff line
@@ -734,10 +734,6 @@ static void calculate_split_count_and_index(struct pipe_ctx *pipe_ctx, int *spli 
			(*split_idx)++;

			split_pipe = split_pipe->top_pipe;

		}



		/* MPO window on right side of ODM split */

		if (split_pipe && split_pipe->prev_odm_pipe && !pipe_ctx->prev_odm_pipe)

			(*split_idx)++;

	} else {

		/*Get odm split index*/

		struct pipe_ctx *split_pipe = pipe_ctx->prev_odm_pipe;
@@ -784,11 +780,7 @@ static void calculate_recout(struct pipe_ctx *pipe_ctx) 
	/*

	 * Only the leftmost ODM pipe should be offset by a nonzero distance

	 */

	if (pipe_ctx->top_pipe && pipe_ctx->top_pipe->prev_odm_pipe && !pipe_ctx->prev_odm_pipe) {

		/* MPO window on right side of ODM split */

		data->recout.x = stream->dst.x + (surf_clip.x - stream->dst.width/2) *

				stream->dst.width / stream->src.width;

	} else if (!pipe_ctx->prev_odm_pipe || split_idx == split_count) {

	if (!pipe_ctx->prev_odm_pipe || split_idx == split_count) {

		data->recout.x = stream->dst.x;

		if (stream->src.x < surf_clip.x)

			data->recout.x += (surf_clip.x - stream->src.x) * stream->dst.width
@@ -986,8 +978,6 @@ static void calculate_inits_and_viewports(struct pipe_ctx *pipe_ctx) 
			* stream->dst.height / stream->src.height;

	if (pipe_ctx->prev_odm_pipe && split_idx)

		ro_lb = data->h_active * split_idx - recout_full_x;

	else if (pipe_ctx->top_pipe && pipe_ctx->top_pipe->prev_odm_pipe)

		ro_lb = data->h_active * split_idx - recout_full_x + data->recout.x;

	else

		ro_lb = data->recout.x - recout_full_x;

	ro_tb = data->recout.y - recout_full_y;
@@ -1086,9 +1076,6 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) 
		timing->v_border_top + timing->v_border_bottom;

	if (pipe_ctx->next_odm_pipe || pipe_ctx->prev_odm_pipe)

		pipe_ctx->plane_res.scl_data.h_active /= get_num_odm_splits(pipe_ctx) + 1;

	/* ODM + windows MPO, where window is on either right or left ODM half */

	else if (pipe_ctx->top_pipe && (pipe_ctx->top_pipe->next_odm_pipe || pipe_ctx->top_pipe->prev_odm_pipe))

		pipe_ctx->plane_res.scl_data.h_active /= get_num_odm_splits(pipe_ctx->top_pipe) + 1;



	/* depends on h_active */

	calculate_recout(pipe_ctx);
@@ -1097,6 +1084,11 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) 
	/* depends on scaling ratios and recout, does not calculate offset yet */

	calculate_viewport_size(pipe_ctx);



	/* Stopgap for validation of ODM + MPO on one side of screen case */

	if (pipe_ctx->plane_res.scl_data.viewport.height < 1 ||

			pipe_ctx->plane_res.scl_data.viewport.width < 1)

		return false;



	/*

	 * LB calculations depend on vp size, h/v_active and scaling ratios

	 * Setting line buffer pixel depth to 24bpp yields banding
@@ -1445,31 +1437,14 @@ bool dc_add_plane_to_context( 
		if (head_pipe != free_pipe) {

			tail_pipe = resource_get_tail_pipe(&context->res_ctx, head_pipe);

			ASSERT(tail_pipe);



			/* ODM + window MPO, where MPO window is on right half only */

			if (free_pipe->plane_state &&

					(free_pipe->plane_state->clip_rect.x >= free_pipe->stream->src.width/2) &&

					tail_pipe->next_odm_pipe) {

				free_pipe->stream_res.tg = tail_pipe->next_odm_pipe->stream_res.tg;

				free_pipe->stream_res.abm = tail_pipe->next_odm_pipe->stream_res.abm;

				free_pipe->stream_res.opp = tail_pipe->next_odm_pipe->stream_res.opp;

				free_pipe->stream_res.stream_enc = tail_pipe->next_odm_pipe->stream_res.stream_enc;

				free_pipe->stream_res.audio = tail_pipe->next_odm_pipe->stream_res.audio;

				free_pipe->clock_source = tail_pipe->next_odm_pipe->clock_source;



				free_pipe->top_pipe = tail_pipe->next_odm_pipe;

				tail_pipe->next_odm_pipe->bottom_pipe = free_pipe;

			} else {

			free_pipe->stream_res.tg = tail_pipe->stream_res.tg;

			free_pipe->stream_res.abm = tail_pipe->stream_res.abm;

			free_pipe->stream_res.opp = tail_pipe->stream_res.opp;

			free_pipe->stream_res.stream_enc = tail_pipe->stream_res.stream_enc;

			free_pipe->stream_res.audio = tail_pipe->stream_res.audio;

			free_pipe->clock_source = tail_pipe->clock_source;



			free_pipe->top_pipe = tail_pipe;

			tail_pipe->bottom_pipe = free_pipe;



			if (!free_pipe->next_odm_pipe && tail_pipe->next_odm_pipe && tail_pipe->next_odm_pipe->bottom_pipe) {

				free_pipe->next_odm_pipe = tail_pipe->next_odm_pipe->bottom_pipe;

				tail_pipe->next_odm_pipe->bottom_pipe->prev_odm_pipe = free_pipe;
@@ -1479,20 +1454,6 @@ bool dc_add_plane_to_context( 
				tail_pipe->prev_odm_pipe->bottom_pipe->next_odm_pipe = free_pipe;

			}

		}

		}



		/* ODM + window MPO, where MPO window is on left half only */

		if (free_pipe->plane_state &&

				(free_pipe->plane_state->clip_rect.x + free_pipe->plane_state->clip_rect.width <=

				free_pipe->stream->src.x + free_pipe->stream->src.width/2)) {

			break;

		}

		/* ODM + window MPO, where MPO window is on right half only */

		if (free_pipe->plane_state &&

				(free_pipe->plane_state->clip_rect.x >= free_pipe->stream->src.width/2)) {

			break;

		}



		head_pipe = head_pipe->next_odm_pipe;

	}

	/* assign new surfaces*/

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c

+0 −11
Original line number Diff line number Diff line
@@ -1761,17 +1761,6 @@ static bool dcn30_split_stream_for_mpc_or_odm( 
	int pipe_idx = sec_pipe->pipe_idx;

	const struct resource_pool *pool = dc->res_pool;



	if (pri_pipe->plane_state) {

		/* ODM + window MPO, where MPO window is on left half only */

		if (pri_pipe->plane_state->clip_rect.x + pri_pipe->plane_state->clip_rect.width <=

				pri_pipe->stream->src.x + pri_pipe->stream->src.width/2)

			return true;



		/* ODM + window MPO, where MPO window is on right half only */

		if (pri_pipe->plane_state->clip_rect.x >= pri_pipe->stream->src.width/2)

			return true;

	}



	*sec_pipe = *pri_pipe;



	sec_pipe->pipe_idx = pipe_idx;