Commit 54fe00be authored by George Shen's avatar George Shen Committed by Alex Deucher
Browse files

drm/amd/display: Implement fixed DP drive settings 



[Why]
Currently there are use cases that require DP link to maintain fixed VS
and PE in HW regardless of what the sink requests. BIOS integrated info
table will specify whether we need to use the fixed drive settings, and
the drive settings to use.

[How]
Implement changes to parse the integrated info table and set the fixed
drive settings accordingly.

Reviewed-by: default avatarWenjing Liu <Wenjing.Liu@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Acked-by: default avatarAgustin Gutierrez <agustin.gutierrez@amd.com>
Signed-off-by: default avatarGeorge Shen <george.shen@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 876e835e

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

+2 −0
Original line number Diff line number Diff line
@@ -2321,6 +2321,8 @@ static enum bp_result get_integrated_info_v2_2( 


	info->ext_disp_conn_info.checksum =

		info_v2_2->extdispconninfo.checksum;

	info->ext_disp_conn_info.fixdpvoltageswing =

		info_v2_2->extdispconninfo.fixdpvoltageswing;



	info->edp1_info.edp_backlight_pwm_hz =

	le16_to_cpu(info_v2_2->edp1_info.edp_backlight_pwm_hz);

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+8 −0
Original line number Diff line number Diff line
@@ -1660,6 +1660,14 @@ static bool dc_link_construct_legacy(struct dc_link *link, 
				DC_LOG_DC("BIOS object table - ddi_channel_mapping: 0x%04X", link->ddi_channel_mapping.raw);

				DC_LOG_DC("BIOS object table - chip_caps: %d", link->chip_caps);

			}



			if (link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) {

				link->bios_forced_drive_settings.VOLTAGE_SWING =

						(info->ext_disp_conn_info.fixdpvoltageswing & 0x3);

				link->bios_forced_drive_settings.PRE_EMPHASIS =

						((info->ext_disp_conn_info.fixdpvoltageswing >> 2) & 0x3);

			}



			break;

		}

	}

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

+7 −1
Original line number Diff line number Diff line
@@ -1661,7 +1661,13 @@ static void override_training_settings( 
	if (overrides->ffe_preset != NULL)

		lt_settings->ffe_preset = overrides->ffe_preset;

#endif



	/* Override HW lane settings with BIOS forced values if present */

	if (link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN &&

			link->lttpr_mode == LTTPR_MODE_TRANSPARENT) {

		lt_settings->voltage_swing = &link->bios_forced_drive_settings.VOLTAGE_SWING;

		lt_settings->pre_emphasis = &link->bios_forced_drive_settings.PRE_EMPHASIS;

		lt_settings->always_match_dpcd_with_hw_lane_settings = false;

	}

	for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) {

		lt_settings->lane_settings[lane].VOLTAGE_SWING =

			lt_settings->voltage_swing != NULL ?

drivers/gpu/drm/amd/display/dc/dc_link.h

+3 −0
Original line number Diff line number Diff line
@@ -178,6 +178,9 @@ struct dc_link { 


	struct psr_settings psr_settings;



	/* Drive settings read from integrated info table */

	struct dc_lane_settings bios_forced_drive_settings;



	/* MST record stream using this link */

	struct link_flags {

		bool dp_keep_receiver_powered;

drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h

+1 −0
Original line number Diff line number Diff line
@@ -328,6 +328,7 @@ struct integrated_info { 


		uint8_t gu_id[NUMBER_OF_UCHAR_FOR_GUID];

		uint8_t checksum;

		uint8_t fixdpvoltageswing;

	} ext_disp_conn_info; /* exiting long long time */



	struct available_s_clk_list {