Commit 58eef878 authored by Robert Richter's avatar Robert Richter Committed by Dan Williams
Browse files

cxl: Unify debug messages when calling devm_cxl_add_dport() 



CXL dports are added in a couple of code paths using
devm_cxl_add_dport(). Debug messages are individually generated, but are
incomplete and inconsistent. Change this by moving its generation to
devm_cxl_add_dport(). This unifies the messages and reduces code
duplication.  Also, generate messages on failure. Use a
__devm_cxl_add_dport() wrapper to keep the readability of the error
exits.

Signed-off-by: default avatarRobert Richter <rrichter@amd.com>
Link: https://lore.kernel.org/r/20221018132341.76259-5-rrichter@amd.com


Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent f3cd264c

drivers/cxl/acpi.c

+2 −5
Original line number Diff line number Diff line
@@ -282,12 +282,9 @@ static int add_host_bridge_dport(struct device *match, void *arg) 
	}



	dport = devm_cxl_add_dport(root_port, match, uid, ctx.chbcr);

	if (IS_ERR(dport)) {

		dev_err(host, "failed to add downstream port: %s\n",

			dev_name(match));

	if (IS_ERR(dport))

		return PTR_ERR(dport);

	}

	dev_dbg(host, "add dport%llu: %s\n", uid, dev_name(match));



	return 0;

}

drivers/cxl/core/pci.c

+0 −2
Original line number Diff line number Diff line
@@ -62,8 +62,6 @@ static int match_add_dports(struct pci_dev *pdev, void *data) 
	}

	ctx->count++;



	dev_dbg(&port->dev, "add dport%d: %s\n", port_num, dev_name(&pdev->dev));



	return 0;

}

drivers/cxl/core/port.c

+34 −14
Original line number Diff line number Diff line
@@ -899,19 +899,9 @@ static void cxl_dport_unlink(void *data) 
	sysfs_remove_link(&port->dev.kobj, link_name);

}



/**

 * devm_cxl_add_dport - append downstream port data to a cxl_port

 * @port: the cxl_port that references this dport

 * @dport_dev: firmware or PCI device representing the dport

 * @port_id: identifier for this dport in a decoder's target list

 * @component_reg_phys: optional location of CXL component registers

 *

 * Note that dports are appended to the devm release action's of the

 * either the port's host (for root ports), or the port itself (for

 * switch ports)

 */

struct cxl_dport *devm_cxl_add_dport(struct cxl_port *port,

				     struct device *dport_dev, int port_id,

static struct cxl_dport *__devm_cxl_add_dport(struct cxl_port *port,

					      struct device *dport_dev,

					      int port_id,

					      resource_size_t component_reg_phys)

{

	char link_name[CXL_TARGET_STRLEN];
@@ -964,6 +954,36 @@ struct cxl_dport *devm_cxl_add_dport(struct cxl_port *port, 


	return dport;

}



/**

 * devm_cxl_add_dport - append downstream port data to a cxl_port

 * @port: the cxl_port that references this dport

 * @dport_dev: firmware or PCI device representing the dport

 * @port_id: identifier for this dport in a decoder's target list

 * @component_reg_phys: optional location of CXL component registers

 *

 * Note that dports are appended to the devm release action's of the

 * either the port's host (for root ports), or the port itself (for

 * switch ports)

 */

struct cxl_dport *devm_cxl_add_dport(struct cxl_port *port,

				     struct device *dport_dev, int port_id,

				     resource_size_t component_reg_phys)

{

	struct cxl_dport *dport;



	dport = __devm_cxl_add_dport(port, dport_dev, port_id,

				     component_reg_phys);

	if (IS_ERR(dport)) {

		dev_dbg(dport_dev, "failed to add dport to %s: %ld\n",

			dev_name(&port->dev), PTR_ERR(dport));

	} else {

		dev_dbg(dport_dev, "dport added to %s\n",

			dev_name(&port->dev));

	}



	return dport;

}

EXPORT_SYMBOL_NS_GPL(devm_cxl_add_dport, CXL);



static int add_ep(struct cxl_ep *new)

tools/testing/cxl/test/cxl.c

+1 −8
Original line number Diff line number Diff line
@@ -634,7 +634,6 @@ static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm) 


static int mock_cxl_port_enumerate_dports(struct cxl_port *port)

{

	struct device *dev = &port->dev;

	struct platform_device **array;

	int i, array_size;
@@ -684,16 +683,10 @@ static int mock_cxl_port_enumerate_dports(struct cxl_port *port) 
		dport = devm_cxl_add_dport(port, &pdev->dev, pdev->id,

					   CXL_RESOURCE_NONE);



		if (IS_ERR(dport)) {

			dev_err(dev, "failed to add dport: %s (%ld)\n",

				dev_name(&pdev->dev), PTR_ERR(dport));

		if (IS_ERR(dport))

			return PTR_ERR(dport);

	}



		dev_dbg(dev, "add dport%d: %s\n", pdev->id,

			dev_name(&pdev->dev));

	}



	return 0;

}