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Commit 5ddfa148 authored by Paul Cercueil's avatar Paul Cercueil Committed by Alexandre Belloni
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rtc: jz4740: Register clock provider for the CLK32K pin



On JZ4770 and JZ4780, the CLK32K pin is configurable. By default, it is
configured as a GPIO in input mode, and its value can be read through
GPIO PD14.

With this change, clients can now request the 32 kHz clock on the CLK32K
pin, through Device Tree. This clock is simply a pass-through of the
input oscillator's clock with enable/disable operations.

This will permit the WiFi/Bluetooth chip to work on the MIPS CI20 board,
which does source one of its clocks from the CLK32K pin.

Signed-off-by: default avatarPaul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20230129120442.22858-5-paul@crapouillou.net


Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@bootlin.com>
parent ff6fd377
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