Commit 5e4e4804 authored by Neil Armstrong's avatar Neil Armstrong Committed by Jerome Brunet
Browse files

clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS 



The way hw_onecell_data is declared:
struct clk_hw_onecell_data {
	unsigned int num;
	struct clk_hw *hws[];
};

makes it impossible to have the clk_hw table declared outside while
using ARRAY_SIZE() to determine ".num" due to ".hws" being a flexible
array member.

Completely move out of hw_onecell_data and add a custom
devm_of_clk_add_hw_provider() "get" callback to retrieve the clk_hw
in order to finally get rid on the NR_CLKS define.

Signed-off-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-5-38172d17c27a@linaro.org


Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
parent c3f2801b

drivers/clk/meson/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -53,6 +53,7 @@ config COMMON_CLK_MESON8B 
	depends on ARM

	default y

	select COMMON_CLK_MESON_REGMAP

	select COMMON_CLK_MESON_CLKC_UTILS

	select COMMON_CLK_MESON_MPLL

	select COMMON_CLK_MESON_PLL

	select MFD_SYSCON

drivers/clk/meson/meson8b.c

+659 −656
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 


#include "meson8b.h"

#include "clk-regmap.h"

#include "meson-clkc-utils.h"

#include "clk-pll.h"

#include "clk-mpll.h"
@@ -2772,8 +2773,7 @@ static MESON_GATE(meson8b_ao_ahb_sram, HHI_GCLK_AO, 1); 
static MESON_GATE(meson8b_ao_ahb_bus, HHI_GCLK_AO, 2);

static MESON_GATE(meson8b_ao_iface, HHI_GCLK_AO, 3);



static struct clk_hw_onecell_data meson8_hw_onecell_data = {

	.hws = {

static struct clk_hw *meson8_hw_clks[] = {

	[CLKID_PLL_FIXED] = &meson8b_fixed_pll.hw,

	[CLKID_PLL_VID] = &meson8b_vid_pll.hw,

	[CLKID_PLL_SYS] = &meson8b_sys_pll.hw,
@@ -2975,13 +2975,9 @@ static struct clk_hw_onecell_data meson8_hw_onecell_data = { 
	[CLKID_CTS_I958]	    = &meson8b_cts_i958.hw,

	[CLKID_VID_PLL_LVDS_EN]	    = &meson8b_vid_pll_lvds_en.hw,

	[CLKID_HDMI_PLL_DCO_IN]	    = &hdmi_pll_dco_in.hw,

		[CLK_NR_CLKS]		    = NULL,

	},

	.num = CLK_NR_CLKS,

};



static struct clk_hw_onecell_data meson8b_hw_onecell_data = {

	.hws = {

static struct clk_hw *meson8b_hw_clks[] = {

	[CLKID_PLL_FIXED] = &meson8b_fixed_pll.hw,

	[CLKID_PLL_VID] = &meson8b_vid_pll.hw,

	[CLKID_PLL_SYS] = &meson8b_sys_pll.hw,
@@ -3194,13 +3190,9 @@ static struct clk_hw_onecell_data meson8b_hw_onecell_data = { 
	[CLKID_CTS_I958]	    = &meson8b_cts_i958.hw,

	[CLKID_VID_PLL_LVDS_EN]	    = &meson8b_vid_pll_lvds_en.hw,

	[CLKID_HDMI_PLL_DCO_IN]	    = &hdmi_pll_dco_in.hw,

		[CLK_NR_CLKS]		    = NULL,

	},

	.num = CLK_NR_CLKS,

};



static struct clk_hw_onecell_data meson8m2_hw_onecell_data = {

	.hws = {

static struct clk_hw *meson8m2_hw_clks[] = {

	[CLKID_PLL_FIXED] = &meson8b_fixed_pll.hw,

	[CLKID_PLL_VID] = &meson8b_vid_pll.hw,

	[CLKID_PLL_SYS] = &meson8b_sys_pll.hw,
@@ -3415,9 +3407,6 @@ static struct clk_hw_onecell_data meson8m2_hw_onecell_data = { 
	[CLKID_CTS_I958]	    = &meson8b_cts_i958.hw,

	[CLKID_VID_PLL_LVDS_EN]	    = &meson8b_vid_pll_lvds_en.hw,

	[CLKID_HDMI_PLL_DCO_IN]	    = &hdmi_pll_dco_in.hw,

		[CLK_NR_CLKS]		    = NULL,

	},

	.num = CLK_NR_CLKS,

};



static struct clk_regmap *const meson8b_clk_regmaps[] = {
@@ -3788,8 +3777,23 @@ static struct meson8b_nb_data meson8b_cpu_nb_data = { 
	.nb.notifier_call = meson8b_cpu_clk_notifier_cb,

};



static struct meson_clk_hw_data meson8_clks = {

	.hws = meson8_hw_clks,

	.num = ARRAY_SIZE(meson8_hw_clks),

};



static struct meson_clk_hw_data meson8b_clks = {

	.hws = meson8b_hw_clks,

	.num = ARRAY_SIZE(meson8b_hw_clks),

};



static struct meson_clk_hw_data meson8m2_clks = {

	.hws = meson8m2_hw_clks,

	.num = ARRAY_SIZE(meson8m2_hw_clks),

};



static void __init meson8b_clkc_init_common(struct device_node *np,

			struct clk_hw_onecell_data *clk_hw_onecell_data)

					    struct meson_clk_hw_data *hw_clks)

{

	struct meson8b_clk_reset *rstc;

	struct device_node *parent_np;
@@ -3830,17 +3834,17 @@ static void __init meson8b_clkc_init_common(struct device_node *np, 
	 * register all clks and start with the first used ID (which is

	 * CLKID_PLL_FIXED)

	 */

	for (i = CLKID_PLL_FIXED; i < CLK_NR_CLKS; i++) {

	for (i = CLKID_PLL_FIXED; i < hw_clks->num; i++) {

		/* array might be sparse */

		if (!clk_hw_onecell_data->hws[i])

		if (!hw_clks->hws[i])

			continue;



		ret = of_clk_hw_register(np, clk_hw_onecell_data->hws[i]);

		ret = of_clk_hw_register(np, hw_clks->hws[i]);

		if (ret)

			return;

	}



	meson8b_cpu_nb_data.cpu_clk = clk_hw_onecell_data->hws[CLKID_CPUCLK];

	meson8b_cpu_nb_data.cpu_clk = hw_clks->hws[CLKID_CPUCLK];



	/*

	 * FIXME we shouldn't program the muxes in notifier handlers. The
@@ -3856,25 +3860,24 @@ static void __init meson8b_clkc_init_common(struct device_node *np, 
		return;

	}



	ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get,

				     clk_hw_onecell_data);

	ret = of_clk_add_hw_provider(np, meson_clk_hw_get, hw_clks);

	if (ret)

		pr_err("%s: failed to register clock provider\n", __func__);

}



static void __init meson8_clkc_init(struct device_node *np)

{

	return meson8b_clkc_init_common(np, &meson8_hw_onecell_data);

	return meson8b_clkc_init_common(np, &meson8_clks);

}



static void __init meson8b_clkc_init(struct device_node *np)

{

	return meson8b_clkc_init_common(np, &meson8b_hw_onecell_data);

	return meson8b_clkc_init_common(np, &meson8b_clks);

}



static void __init meson8m2_clkc_init(struct device_node *np)

{

	return meson8b_clkc_init_common(np, &meson8m2_hw_onecell_data);

	return meson8b_clkc_init_common(np, &meson8m2_clks);

}



CLK_OF_DECLARE_DRIVER(meson8_clkc, "amlogic,meson8-clkc",

drivers/clk/meson/meson8b.h

+0 −2
Original line number Diff line number Diff line
@@ -185,8 +185,6 @@ 
#define CLKID_VID_PLL_LVDS_EN	216

#define CLKID_HDMI_PLL_DCO_IN   217



#define CLK_NR_CLKS		218



/*

 * include the CLKID and RESETID that have

 * been made part of the stable DT binding