Commit 625f8fb5 authored by Zack Rusin's avatar Zack Rusin
Browse files

drm/vmwgfx: Fix display register usage for some older configs 



We can't be setting the display_id register to an invalid value
because that makes our device reset the fb which causes nasty
flicker (due to destruction and creation of a new fb).
Also we can't be using the BITS_PER_PIXEL register if the
8BIT_EMULATION is not supported.

Signed-off-by: default avatarZack Rusin <zackr@vmware.com>
Reviewed-by: default avatarMartin Krastev <krastevm@vmware.com>
Reviewed-by: default avatarRoland Scheidegger <sroland@vmware.com>
Link: https://patchwork.freedesktop.org/patch/414041/?series=85516&rev=2
parent 8426ed9c

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

+2 −1
Original line number Diff line number Diff line
@@ -1875,6 +1875,7 @@ int vmw_kms_write_svga(struct vmw_private *vmw_priv, 
		vmw_fifo_mem_write(vmw_priv, SVGA_FIFO_PITCHLOCK, pitch);

	vmw_write(vmw_priv, SVGA_REG_WIDTH, width);

	vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);

	if ((vmw_priv->capabilities & SVGA_CAP_8BIT_EMULATION) != 0)

		vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);



	if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

+0 −1
Original line number Diff line number Diff line
@@ -125,7 +125,6 @@ static int vmw_ldu_commit_list(struct vmw_private *dev_priv) 
		vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, crtc->y);

		vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, crtc->mode.hdisplay);

		vmw_write(dev_priv, SVGA_REG_DISPLAY_HEIGHT, crtc->mode.vdisplay);

		vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);



		i++;

	}