Commit 6c2bebfc authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
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drm/amdgpu: Add vcn/jpeg ras err status registers 



Add new ras error status registers introduced in
vcn v4_0_3 to log vcn and jpeg ras error.

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b4520bfd

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_offset.h

+78 −0
Original line number Diff line number Diff line
@@ -1500,6 +1500,84 @@ 
#define regVCN_RAS_CNTL_MMSCH                                                                           0x0914

#define regVCN_RAS_CNTL_MMSCH_BASE_IDX                                                                  1



// addressBlock: aid_uvd0_vcn_edcc_dec

// base address: 0x21d20

#define regVCN_UE_ERR_STATUS_LO_VIDD                                                                    0x094c

#define regVCN_UE_ERR_STATUS_LO_VIDD_BASE_IDX                                                           1

#define regVCN_UE_ERR_STATUS_HI_VIDD                                                                    0x094d

#define regVCN_UE_ERR_STATUS_HI_VIDD_BASE_IDX                                                           1

#define regVCN_UE_ERR_STATUS_LO_VIDV                                                                    0x094e

#define regVCN_UE_ERR_STATUS_LO_VIDV_BASE_IDX                                                           1

#define regVCN_UE_ERR_STATUS_HI_VIDV                                                                    0x094f

#define regVCN_UE_ERR_STATUS_HI_VIDV_BASE_IDX                                                           1

#define regVCN_CE_ERR_STATUS_LO_MMSCHD                                                                  0x0950

#define regVCN_CE_ERR_STATUS_LO_MMSCHD_BASE_IDX                                                         1

#define regVCN_CE_ERR_STATUS_HI_MMSCHD                                                                  0x0951

#define regVCN_CE_ERR_STATUS_HI_MMSCHD_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG0S                                                                  0x0952

#define regVCN_UE_ERR_STATUS_LO_JPEG0S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG0S                                                                  0x0953

#define regVCN_UE_ERR_STATUS_HI_JPEG0S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG0D                                                                  0x0954

#define regVCN_UE_ERR_STATUS_LO_JPEG0D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG0D                                                                  0x0955

#define regVCN_UE_ERR_STATUS_HI_JPEG0D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG1S                                                                  0x0956

#define regVCN_UE_ERR_STATUS_LO_JPEG1S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG1S                                                                  0x0957

#define regVCN_UE_ERR_STATUS_HI_JPEG1S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG1D                                                                  0x0958

#define regVCN_UE_ERR_STATUS_LO_JPEG1D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG1D                                                                  0x0959

#define regVCN_UE_ERR_STATUS_HI_JPEG1D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG2S                                                                  0x095a

#define regVCN_UE_ERR_STATUS_LO_JPEG2S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG2S                                                                  0x095b

#define regVCN_UE_ERR_STATUS_HI_JPEG2S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG2D                                                                  0x095c

#define regVCN_UE_ERR_STATUS_LO_JPEG2D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG2D                                                                  0x095d

#define regVCN_UE_ERR_STATUS_HI_JPEG2D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG3S                                                                  0x095e

#define regVCN_UE_ERR_STATUS_LO_JPEG3S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG3S                                                                  0x095f

#define regVCN_UE_ERR_STATUS_HI_JPEG3S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG3D                                                                  0x0960

#define regVCN_UE_ERR_STATUS_LO_JPEG3D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG3D                                                                  0x0961

#define regVCN_UE_ERR_STATUS_HI_JPEG3D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG4S                                                                  0x0962

#define regVCN_UE_ERR_STATUS_LO_JPEG4S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG4S                                                                  0x0963

#define regVCN_UE_ERR_STATUS_HI_JPEG4S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG4D                                                                  0x0964

#define regVCN_UE_ERR_STATUS_LO_JPEG4D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG4D                                                                  0x0965

#define regVCN_UE_ERR_STATUS_HI_JPEG4D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG5S                                                                  0x0966

#define regVCN_UE_ERR_STATUS_LO_JPEG5S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG5S                                                                  0x0967

#define regVCN_UE_ERR_STATUS_HI_JPEG5S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG5D                                                                  0x0968

#define regVCN_UE_ERR_STATUS_LO_JPEG5D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG5D                                                                  0x0969

#define regVCN_UE_ERR_STATUS_HI_JPEG5D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG6S                                                                  0x096a

#define regVCN_UE_ERR_STATUS_LO_JPEG6S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG6S                                                                  0x096b

#define regVCN_UE_ERR_STATUS_HI_JPEG6S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG6D                                                                  0x096c

#define regVCN_UE_ERR_STATUS_LO_JPEG6D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG6D                                                                  0x096d

#define regVCN_UE_ERR_STATUS_HI_JPEG6D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG7S                                                                  0x096e

#define regVCN_UE_ERR_STATUS_LO_JPEG7S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG7S                                                                  0x096f

#define regVCN_UE_ERR_STATUS_HI_JPEG7S_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_LO_JPEG7D                                                                  0x0970

#define regVCN_UE_ERR_STATUS_LO_JPEG7D_BASE_IDX                                                         1

#define regVCN_UE_ERR_STATUS_HI_JPEG7D                                                                  0x0971

#define regVCN_UE_ERR_STATUS_HI_JPEG7D_BASE_IDX                                                         1



// addressBlock: aid_uvd0_uvd_jrbc1_uvd_jrbc_dec

// base address: 0x1e000

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_sh_mask.h

+495 −0

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