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Commit 71fbafcc authored by Austin Christ's avatar Austin Christ Committed by Wolfram Sang
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i2c: qup: Correct duty cycle for FM and FM+



The I2C spec UM10204 Rev. 6 specifies the following timings.

           Standard      Fast Mode     Fast Mode Plus
SCL low    4.7us         1.3us         0.5us
SCL high   4.0us         0.6us         0.26us

This results in a 33%/66% duty cycle as opposed to the 50%/50% duty cycle
used for Standard-mode.

Add High Time Divider settings to correct duty cycle for FM(400kHz) and
FM+(1MHz).

Signed-off-by: default avatarAustin Christ <austinwc@codeaurora.org>
Reviewed-by: default avatarSricharan R <sricharan@codeaurora.org>
Reviewed-by: default avatarAndy Gross <andy.gross@linaro.org>
Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
parent 109b8c42
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