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Commit 7629838c authored by Frank Li's avatar Frank Li Committed by David S. Miller
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ARM: dts: imx6q: Add ENET PTP clock pin and clock source


Add ENET 1588 clock input pin
MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT
and anatop PLL8 clock source for ENET

Signed-off-by: default avatarFrank Li <Frank.Li@freescale.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 405f257f
No related merge requests found
......@@ -580,6 +580,7 @@ pinctrl_enet_1: enetgrp-1 {
66 0x1b0b0 /* MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 */
70 0x1b0b0 /* MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 */
48 0x1b0b0 /* MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL */
1033 0x4001b0a8 /* MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT*/
>;
};
......@@ -833,8 +834,8 @@ ethernet@02188000 {
compatible = "fsl,imx6q-fec";
reg = <0x02188000 0x4000>;
interrupts = <0 118 0x04 0 119 0x04>;
clocks = <&clks 117>, <&clks 117>;
clock-names = "ipg", "ahb";
clocks = <&clks 117>, <&clks 117>, <&clks 177>;
clock-names = "ipg", "ahb", "ptp";
status = "disabled";
};
......
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