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Commit 7ac853ba authored by Aniruddha Rao's avatar Aniruddha Rao Committed by Thierry Reding
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arm64: tegra: Update SDMMC1/3 clock source for Tegra194 



The default parent for SDMMC1/3 clock sources can provide maximum frequency
of 136MHz for SDR104 mode.
Update parent clock source for SDMMC1/SDMMC3 instances
to increase the output clock frequency to 195MHz and improve the perf.

Signed-off-by: default avatarAniruddha Rao <anrao@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 31231092
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