Commit 95f78acd authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/gr/gf100-: make global bundle_cb actually global 



This was thought to be per-channel initially - it's not.  The backing
pages for the VMM mappings are shared for all channels.

- switches to more straight-forward patch interfaces
- prepares for sub-context support

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent d05095b5

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c

+6 −9
Original line number Diff line number Diff line
@@ -1050,15 +1050,12 @@ gf100_grctx_generate_r419cb8(struct gf100_gr *gr) 
}



void

gf100_grctx_generate_bundle(struct gf100_grctx *info)

gf100_grctx_generate_bundle(struct gf100_gr_chan *chan, u64 addr, u32 size)

{

	const struct gf100_grctx_func *grctx = info->gr->func->grctx;

	const int s = 8;

	const int b = mmio_vram(info, grctx->bundle_size, (1 << s), true);

	mmio_refn(info, 0x408004, 0x00000000, s, b);

	mmio_wr32(info, 0x408008, 0x80000000 | (grctx->bundle_size >> s));

	mmio_refn(info, 0x418808, 0x00000000, s, b);

	mmio_wr32(info, 0x41880c, 0x80000000 | (grctx->bundle_size >> s));

	gf100_grctx_patch_wr32(chan, 0x408004, addr >> 8);

	gf100_grctx_patch_wr32(chan, 0x408008, 0x80000000 | (size >> 8));

	gf100_grctx_patch_wr32(chan, 0x418808, addr >> 8);

	gf100_grctx_patch_wr32(chan, 0x41880c, 0x80000000 | (size >> 8));

}



void
@@ -1396,7 +1393,7 @@ gf100_grctx_generate_main(struct gf100_gr_chan *chan, struct gf100_grctx *info) 
	idle_timeout = nvkm_mask(device, 0x404154, 0xffffffff, 0x00000000);



	grctx->pagepool(chan, chan->pagepool->addr);

	grctx->bundle(info);

	grctx->bundle(chan, chan->bundle_cb->addr, grctx->bundle_size);

	grctx->attrib(info);

	if (grctx->patch_ltc)

		grctx->patch_ltc(info);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h

+4 −4
Original line number Diff line number Diff line
@@ -39,7 +39,7 @@ struct gf100_grctx_func { 
	const struct gf100_gr_pack *mthd;

	const struct gf100_gr_pack *sw_veid_bundle_init;

	/* bundle circular buffer */

	void (*bundle)(struct gf100_grctx *);

	void (*bundle)(struct gf100_gr_chan *, u64 addr, u32 size);

	u32 bundle_size;

	u32 bundle_min_gpm_fifo_depth;

	u32 bundle_token_limit;
@@ -84,8 +84,8 @@ struct gf100_grctx_func { 
extern const struct gf100_grctx_func gf100_grctx;

int  gf100_grctx_generate(struct gf100_gr *, struct gf100_gr_chan *, struct nvkm_gpuobj *inst);

void gf100_grctx_generate_main(struct gf100_gr_chan *, struct gf100_grctx *);

void gf100_grctx_generate_bundle(struct gf100_grctx *);

void gf100_grctx_generate_pagepool(struct gf100_gr_chan *, u64);

void gf100_grctx_generate_bundle(struct gf100_gr_chan *, u64, u32);

void gf100_grctx_generate_attrib(struct gf100_grctx *);

void gf100_grctx_generate_unkn(struct gf100_gr *);

void gf100_grctx_generate_floorsweep(struct gf100_gr *);
@@ -116,8 +116,8 @@ void gk104_grctx_generate_alpha_beta_tables(struct gf100_gr *); 
void gk104_grctx_generate_gpc_tpc_nr(struct gf100_gr *);



extern const struct gf100_grctx_func gk20a_grctx;

void gk104_grctx_generate_bundle(struct gf100_grctx *);

void gk104_grctx_generate_pagepool(struct gf100_gr_chan *, u64);

void gk104_grctx_generate_bundle(struct gf100_gr_chan *, u64, u32);

void gk104_grctx_generate_patch_ltc(struct gf100_grctx *);

void gk104_grctx_generate_unkn(struct gf100_gr *);

void gk104_grctx_generate_r418800(struct gf100_gr *);
@@ -129,8 +129,8 @@ extern const struct gf100_grctx_func gk110b_grctx; 
extern const struct gf100_grctx_func gk208_grctx;



extern const struct gf100_grctx_func gm107_grctx;

void gm107_grctx_generate_bundle(struct gf100_grctx *);

void gm107_grctx_generate_pagepool(struct gf100_gr_chan *, u64);

void gm107_grctx_generate_bundle(struct gf100_gr_chan *, u64, u32);

void gm107_grctx_generate_attrib(struct gf100_grctx *);

void gm107_grctx_generate_sm_id(struct gf100_gr *, int, int, int);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c

+6 −11
Original line number Diff line number Diff line
@@ -872,19 +872,14 @@ gk104_grctx_generate_patch_ltc(struct gf100_grctx *info) 
}



void

gk104_grctx_generate_bundle(struct gf100_grctx *info)

gk104_grctx_generate_bundle(struct gf100_gr_chan *chan, u64 addr, u32 size)

{

	const struct gf100_grctx_func *grctx = info->gr->func->grctx;

	const u32 state_limit = min(grctx->bundle_min_gpm_fifo_depth,

				    grctx->bundle_size / 0x20);

	const struct gf100_grctx_func *grctx = chan->gr->func->grctx;

	const u32 state_limit = min(grctx->bundle_min_gpm_fifo_depth, size / 0x20);

	const u32 token_limit = grctx->bundle_token_limit;

	const int s = 8;

	const int b = mmio_vram(info, grctx->bundle_size, (1 << s), true);

	mmio_refn(info, 0x408004, 0x00000000, s, b);

	mmio_wr32(info, 0x408008, 0x80000000 | (grctx->bundle_size >> s));

	mmio_refn(info, 0x418808, 0x00000000, s, b);

	mmio_wr32(info, 0x41880c, 0x80000000 | (grctx->bundle_size >> s));

	mmio_wr32(info, 0x4064c8, (state_limit << 16) | token_limit);



	gf100_grctx_generate_bundle(chan, addr, size);

	gf100_grctx_patch_wr32(chan, 0x4064c8, (state_limit << 16) | token_limit);

}



void

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c

+1 −1
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ gk20a_grctx_generate_main(struct gf100_gr_chan *chan, struct gf100_grctx *info) 


	gf100_gr_icmd(gr, gr->bundle);

	grctx->pagepool(chan, chan->pagepool->addr);

	grctx->bundle(info);

	grctx->bundle(chan, chan->bundle_cb->addr, grctx->bundle_size);

}



const struct gf100_grctx_func

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c

+9 −11
Original line number Diff line number Diff line
@@ -876,19 +876,17 @@ gm107_grctx_generate_r419e00(struct gf100_gr *gr) 
}



void

gm107_grctx_generate_bundle(struct gf100_grctx *info)

gm107_grctx_generate_bundle(struct gf100_gr_chan *chan, u64 addr, u32 size)

{

	const struct gf100_grctx_func *grctx = info->gr->func->grctx;

	const u32 state_limit = min(grctx->bundle_min_gpm_fifo_depth,

				    grctx->bundle_size / 0x20);

	const struct gf100_grctx_func *grctx = chan->gr->func->grctx;

	const u32 state_limit = min(grctx->bundle_min_gpm_fifo_depth, size / 0x20);

	const u32 token_limit = grctx->bundle_token_limit;

	const int s = 8;

	const int b = mmio_vram(info, grctx->bundle_size, (1 << s), true);

	mmio_refn(info, 0x408004, 0x00000000, s, b);

	mmio_wr32(info, 0x408008, 0x80000000 | (grctx->bundle_size >> s));

	mmio_refn(info, 0x418e24, 0x00000000, s, b);

	mmio_wr32(info, 0x418e28, 0x80000000 | (grctx->bundle_size >> s));

	mmio_wr32(info, 0x4064c8, (state_limit << 16) | token_limit);



	gf100_grctx_patch_wr32(chan, 0x408004, addr >> 8);

	gf100_grctx_patch_wr32(chan, 0x408008, 0x80000000 | (size >> 8));

	gf100_grctx_patch_wr32(chan, 0x418e24, addr >> 8);

	gf100_grctx_patch_wr32(chan, 0x418e28, 0x80000000 | (size >> 8));

	gf100_grctx_patch_wr32(chan, 0x4064c8, (state_limit << 16) | token_limit);

}



void