Unverified Commit 9bcf56c9 authored by Mark Brown's avatar Mark Brown
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Merge series "Add I2S-MCC support for Microchip's SAMA7G5" from Codrin...

Merge series "Add I2S-MCC support for Microchip's SAMA7G5" from Codrin Ciubotariu <codrin.ciubotariu@microchip.com>:

SAMA7G5 includes an updated version of I2S-MCC, found previously on
SAM9X60. This controller includes 8 data pins, 4 for playback and 4 for
capture. For I2S and LEFT_J formats, these pins can be used to
send/receive up to 8 audio channels. For DSP_A, with TDM, any pins pair
(DIN/DOUT) from these 4 can be selected to send/receive data. This
version also includes 2 FIFOs (send and receive).
This patch set starts by moving the driver's bindings to yaml and
continues with adding a new compatible for the SAMA7G5 variant, followed
by the changes needed for I2S/LEFT_J support, TDM pin pair selection and
FIFO support, exclusively for SAMA7G5.

Changes in v2:
- moved DT binding conversion patch from the beginning to the end of the
  patch serieses
- patches that update the DT binding are modified to change .txt file
  instead of .yaml

Codrin Ciubotariu (7):
  dt-bindings: mchp,i2s-mcc: Add SAMA7G5 to binding
  ASoC: mchp-i2s-mcc: Add compatible for SAMA7G5
  ASoC: mchp-i2s-mcc: Add multi-channel support for I2S and LEFT_J
    formats
  dt-bindings: mchp,i2s-mcc: Add property to specify pin pair for TDM
  ASoC: mchp-i2s-mcc: Add support to select TDM pins
  ASoC: mchp-i2s-mcc: Add FIFOs support
  ASoC: convert Microchip I2SMCC binding to yaml

 .../bindings/sound/mchp,i2s-mcc.yaml          | 108 ++++++++++++
 .../bindings/sound/mchp-i2s-mcc.txt           |  43 -----
 sound/soc/atmel/Kconfig                       |   3 +
 sound/soc/atmel/mchp-i2s-mcc.c                | 161 +++++++++++++++---
 4 files changed, 252 insertions(+), 63 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
 delete mode 100644 Documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt

--
2.27.0
parents 54271282 ac922edc
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/mchp,i2s-mcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Microchip I2S Multi-Channel Controller

maintainers:
  - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>

description:
  The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
  supports a Time Division Multiplexed (TDM) interface with external
  multi-channel audio codecs. It consists of a receiver, a transmitter and a
  common clock generator that can be enabled separately to provide Adapter,
  Client or Controller modes with receiver and/or transmitter active.
  On later I2SMCC versions (starting with Microchip's SAMA7G5) I2S
  multi-channel is supported by using multiple data pins, output and
  input, without TDM.

properties:
  "#sound-dai-cells":
    const: 0

  compatible:
    enum:
      - microchip,sam9x60-i2smcc
      - microchip,sama7g5-i2smcc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: Peripheral Bus Clock
      - description: Generic Clock (Optional). Should be set mostly when Master
          Mode is required.
    minItems: 1

  clock-names:
    items:
      - const: pclk
      - const: gclk
    minItems: 1

  dmas:
    items:
      - description: TX DMA Channel
      - description: RX DMA Channel

  dma-names:
    items:
      - const: tx
      - const: rx

  microchip,tdm-data-pair:
    description:
      Represents the DIN/DOUT pair pins that are used to receive/send
      TDM data. It is optional and it is only needed if the controller
      uses the TDM mode.
    $ref: /schemas/types.yaml#/definitions/uint8
    enum: [0, 1, 2, 3]
    default: 0

if:
  properties:
    compatible:
      const: microchip,sam9x60-i2smcc
then:
  properties:
    microchip,tdm-data-pair: false

required:
  - "#sound-dai-cells"
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - dmas
  - dma-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/dma/at91.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    i2s@f001c000 {
        #sound-dai-cells = <0>;
        compatible = "microchip,sam9x60-i2smcc";
        reg = <0xf001c000 0x100>;
        interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
        dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
                       AT91_XDMAC_DT_PERID(36))>,
               <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
                       AT91_XDMAC_DT_PERID(37))>;
        dma-names = "tx", "rx";
        clocks = <&i2s_clk>, <&i2s_gclk>;
        clock-names = "pclk", "gclk";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2s_default>;
    };
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* Microchip I2S Multi-Channel Controller

Required properties:
- compatible:     Should be "microchip,sam9x60-i2smcc" or
		  "microchip,sama7g5-i2smcc".
- reg:            Should be the physical base address of the controller and the
                  length of memory mapped region.
- interrupts:     Should contain the interrupt for the controller.
- dmas:           Should be one per channel name listed in the dma-names property,
                  as described in atmel-dma.txt and dma.txt files.
- dma-names:      Identifier string for each DMA request line in the dmas property.
		  Two dmas have to be defined, "tx" and "rx".
- clocks:         Must contain an entry for each entry in clock-names.
                  Please refer to clock-bindings.txt.
- clock-names:    Should be one of each entry matching the clocks phandles list:
                  - "pclk" (peripheral clock) Required.
                  - "gclk" (generated clock) Optional (1).

Optional properties:
- pinctrl-0:      Should specify pin control groups used for this controller.
- princtrl-names: Should contain only one value - "default".
- microchip,tdm-data-pair: 8 bit value that represents the DIN/DOUT pair pins
			   which are used to receive/send TDM data. It is optional
			   and it is only needed if the controller uses the TDM
			   mode. Not available for "microchip,sam9x60-i2smcc"
			   compatible. If it's not present, the default value is 0,
			   so the DIN/DOUT 0 pins are used.

(1) : Only the peripheral clock is required. The generated clock is optional
      and should be set mostly when Master Mode is required.

Example:

	i2s@f001c000 {
		compatible = "microchip,sam9x60-i2smcc";
		reg = <0xf001c000 0x100>;
		interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
		dmas = <&dma0
			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
			 AT91_XDMAC_DT_PERID(36))>,
		       <&dma0
			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
			 AT91_XDMAC_DT_PERID(37))>;
		dma-names = "tx", "rx";
		clocks = <&i2s_clk>, <&i2s_gclk>;
		clock-names = "pclk", "gclk";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2s_default>;
	};