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Commit a3d0245c authored by Max Filippov's avatar Max Filippov
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xtensa: fix xtensa_wsr always writing 0



The commit cad6fade ("xtensa: clean up WSR*/RSR*/get_sr/set_sr")
replaced 'WSR' macro in the function xtensa_wsr with 'xtensa_set_sr',
but variable 'v' in the xtensa_set_sr body shadowed the argument 'v'
passed to it, resulting in wrong value written to debug registers.

Fix that by removing intermediate variable from the xtensa_set_sr
macro body.

Cc: stable@vger.kernel.org
Fixes: cad6fade ("xtensa: clean up WSR*/RSR*/get_sr/set_sr")
Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
parent 7dc0eb0b
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