Loading drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c +1 −1 Original line number Diff line number Diff line Loading @@ -118,7 +118,7 @@ nv04_fifo_chan_ctor(struct nouveau_object *parent, { struct nv04_fifo_priv *priv = (void *)engine; struct nv04_fifo_chan *chan; struct nv_channel_dma_class *args = data; struct nv03_channel_dma_class *args = data; int ret; if (size < sizeof(*args)) Loading drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c +1 −1 Original line number Diff line number Diff line Loading @@ -61,7 +61,7 @@ nv10_fifo_chan_ctor(struct nouveau_object *parent, { struct nv04_fifo_priv *priv = (void *)engine; struct nv04_fifo_chan *chan; struct nv_channel_dma_class *args = data; struct nv03_channel_dma_class *args = data; int ret; if (size < sizeof(*args)) Loading drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c +1 −1 Original line number Diff line number Diff line Loading @@ -66,7 +66,7 @@ nv17_fifo_chan_ctor(struct nouveau_object *parent, { struct nv04_fifo_priv *priv = (void *)engine; struct nv04_fifo_chan *chan; struct nv_channel_dma_class *args = data; struct nv03_channel_dma_class *args = data; int ret; if (size < sizeof(*args)) Loading drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c +1 −1 Original line number Diff line number Diff line Loading @@ -184,7 +184,7 @@ nv40_fifo_chan_ctor(struct nouveau_object *parent, { struct nv04_fifo_priv *priv = (void *)engine; struct nv04_fifo_chan *chan; struct nv_channel_dma_class *args = data; struct nv03_channel_dma_class *args = data; int ret; if (size < sizeof(*args)) Loading drivers/gpu/drm/nouveau/core/include/core/class.h +1 −1 Original line number Diff line number Diff line Loading @@ -57,7 +57,7 @@ struct nv_dma_class { * 406e: NV40_CHANNEL_DMA */ struct nv_channel_dma_class { struct nv03_channel_dma_class { u32 pushbuf; u32 pad0; u64 offset; Loading Loading
drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c +1 −1 Original line number Diff line number Diff line Loading @@ -118,7 +118,7 @@ nv04_fifo_chan_ctor(struct nouveau_object *parent, { struct nv04_fifo_priv *priv = (void *)engine; struct nv04_fifo_chan *chan; struct nv_channel_dma_class *args = data; struct nv03_channel_dma_class *args = data; int ret; if (size < sizeof(*args)) Loading
drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c +1 −1 Original line number Diff line number Diff line Loading @@ -61,7 +61,7 @@ nv10_fifo_chan_ctor(struct nouveau_object *parent, { struct nv04_fifo_priv *priv = (void *)engine; struct nv04_fifo_chan *chan; struct nv_channel_dma_class *args = data; struct nv03_channel_dma_class *args = data; int ret; if (size < sizeof(*args)) Loading
drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c +1 −1 Original line number Diff line number Diff line Loading @@ -66,7 +66,7 @@ nv17_fifo_chan_ctor(struct nouveau_object *parent, { struct nv04_fifo_priv *priv = (void *)engine; struct nv04_fifo_chan *chan; struct nv_channel_dma_class *args = data; struct nv03_channel_dma_class *args = data; int ret; if (size < sizeof(*args)) Loading
drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c +1 −1 Original line number Diff line number Diff line Loading @@ -184,7 +184,7 @@ nv40_fifo_chan_ctor(struct nouveau_object *parent, { struct nv04_fifo_priv *priv = (void *)engine; struct nv04_fifo_chan *chan; struct nv_channel_dma_class *args = data; struct nv03_channel_dma_class *args = data; int ret; if (size < sizeof(*args)) Loading
drivers/gpu/drm/nouveau/core/include/core/class.h +1 −1 Original line number Diff line number Diff line Loading @@ -57,7 +57,7 @@ struct nv_dma_class { * 406e: NV40_CHANNEL_DMA */ struct nv_channel_dma_class { struct nv03_channel_dma_class { u32 pushbuf; u32 pad0; u64 offset; Loading