Commit ac94f665 authored by Chanho Park's avatar Chanho Park Committed by Krzysztof Kozlowski
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arm64: dts: exynosautov9: add fsys0/1 clock DT nodes 



Add cmu_fsys0 and cmu_fsys1 for PCIe clocks and USB/MMC clocks
respectively.

Signed-off-by: default avatarChanho Park <chanho61.park@samsung.com>
Reviewed-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
[krzk: put nodes ordered by unit address]
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/50f8145bca30cf5c900359d0b78c1c617090e021.1659054220.git.chanho61.park@samsung.com
parent 8f3fc0ed

arch/arm64/boot/dts/exynos/exynosautov9.dtsi

+28 −0
Original line number Diff line number Diff line
@@ -207,6 +207,34 @@ cmu_peric1: clock-controller@10800000 { 
				      "dout_clkcmu_peric1_ip";

		};



		cmu_fsys1: clock-controller@17040000 {

			compatible = "samsung,exynosautov9-cmu-fsys1";

			reg = <0x17040000 0x8000>;

			#clock-cells = <1>;



			clocks = <&xtcxo>,

				 <&cmu_top DOUT_CLKCMU_FSYS1_BUS>,

				 <&cmu_top GOUT_CLKCMU_FSYS1_MMC_CARD>,

				 <&cmu_top DOUT_CLKCMU_FSYS1_USBDRD>;

			clock-names = "oscclk",

				      "dout_clkcmu_fsys1_bus",

				      "gout_clkcmu_fsys1_mmc_card",

				      "dout_clkcmu_fsys1_usbdrd";

		};



		cmu_fsys0: clock-controller@17700000 {

			compatible = "samsung,exynosautov9-cmu-fsys0";

			reg = <0x17700000 0x8000>;

			#clock-cells = <1>;



			clocks = <&xtcxo>,

				 <&cmu_top DOUT_CLKCMU_FSYS0_BUS>,

				 <&cmu_top DOUT_CLKCMU_FSYS0_PCIE>;

			clock-names = "oscclk",

				      "dout_clkcmu_fsys0_bus",

				      "dout_clkcmu_fsys0_pcie";

		};



		cmu_fsys2: clock-controller@17c00000 {

			compatible = "samsung,exynosautov9-cmu-fsys2";

			reg = <0x17c00000 0x8000>;