Commit aca935c7 authored by Bhawanpreet Lakha's avatar Bhawanpreet Lakha Committed by Alex Deucher
Browse files

drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flag



[Why]

DCN21 is stable enough to be build by default. So drop the flags.

[How]

Remove them using the unifdef tool. The following commands were executed
in sequence:

$ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';'
$ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';'

In addition:

* Remove from kconfig, and replace any dependencies with DCN1_0.
* Remove from any makefiles.
* Fix and cleanup Renoir definitions in dal_asic_id.h
* Expand DCN1 ifdef to include DCN21 code in the following files:
    * clk_mgr/clk_mgr.c: dc_clk_mgr_create()
    * core/dc_resources.c: dc_create_resource_pool()
    * gpio/hw_factory.c: dal_hw_factory_init()
    * gpio/hw_translate.c: dal_hw_translate_init()

Signed-off-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1da37801
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+0 −2
Original line number Diff line number Diff line
@@ -2603,8 +2603,6 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
	case CHIP_NAVI10:
	case CHIP_NAVI14:
	case CHIP_NAVI12:
#endif
#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
	case CHIP_RENOIR:
#endif
		return amdgpu_dc != 0;
+1 −17
Original line number Diff line number Diff line
@@ -15,23 +15,7 @@ config DRM_AMD_DC
config DRM_AMD_DC_DCN1_0
	def_bool n
	help
	  RV and NV family support for display engine

config DRM_AMD_DC_DCN2_1
	bool "DCN 2.1 family"
	depends on DRM_AMD_DC && X86
	help
	  Choose this option if you want to have
	  Renoir support for display engine

config DRM_AMD_DC_DSC_SUPPORT
	bool "DSC support"
	default y
	depends on DRM_AMD_DC && X86
	depends on DRM_AMD_DC_DCN1_0
	help
	  Choose this option if you want to have
	  Dynamic Stream Compression support
	  Raven, Navi and Renoir family support for display engine

config DRM_AMD_DC_HDCP
	bool "Enable HDCP support in DC"
+0 −6
Original line number Diff line number Diff line
@@ -2756,9 +2756,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
	case CHIP_NAVI12:
	case CHIP_NAVI10:
	case CHIP_NAVI14:
#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
	case CHIP_RENOIR:
#endif
		if (dcn10_register_irq_handlers(dm->adev)) {
			DRM_ERROR("DM: Failed to initialize IRQ\n");
			goto fail;
@@ -2922,13 +2920,11 @@ static int dm_early_init(void *handle)
		adev->mode_info.num_hpd = 5;
		adev->mode_info.num_dig = 5;
		break;
#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
	case CHIP_RENOIR:
		adev->mode_info.num_crtc = 4;
		adev->mode_info.num_hpd = 4;
		adev->mode_info.num_dig = 4;
		break;
#endif
	default:
		DRM_ERROR("Unsupported ASIC type: 0x%X\n", adev->asic_type);
		return -EINVAL;
@@ -3224,9 +3220,7 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev,
	    adev->asic_type == CHIP_NAVI10 ||
	    adev->asic_type == CHIP_NAVI14 ||
	    adev->asic_type == CHIP_NAVI12 ||
#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
	    adev->asic_type == CHIP_RENOIR ||
#endif
	    adev->asic_type == CHIP_RAVEN) {
		/* Fill GFX9 params */
		tiling_info->gfx9.num_pipes =
+0 −4
Original line number Diff line number Diff line
@@ -891,7 +891,6 @@ enum pp_smu_status pp_nv_get_uclk_dpm_states(struct pp_smu *pp,
	return PP_SMU_RESULT_FAIL;
}

#ifdef CONFIG_DRM_AMD_DC_DCN2_1
enum pp_smu_status pp_rn_get_dpm_clock_table(
		struct pp_smu *pp, struct dpm_clocks *clock_table)
{
@@ -973,7 +972,6 @@ enum pp_smu_status pp_rn_set_wm_ranges(struct pp_smu *pp,

	return PP_SMU_RESULT_OK;
}
#endif

void dm_pp_get_funcs(
		struct dc_context *ctx,
@@ -1018,14 +1016,12 @@ void dm_pp_get_funcs(
		funcs->nv_funcs.set_pstate_handshake_support = pp_nv_set_pstate_handshake_support;
		break;

#ifdef CONFIG_DRM_AMD_DC_DCN2_1
	case DCN_VERSION_2_1:
		funcs->ctx.ver = PP_SMU_VER_RN;
		funcs->rn_funcs.pp_smu.dm = ctx;
		funcs->rn_funcs.set_wm_ranges = pp_rn_set_wm_ranges;
		funcs->rn_funcs.get_dpm_clock_table = pp_rn_get_dpm_clock_table;
		break;
#endif
	default:
		DRM_ERROR("smu version is not supported !\n");
		break;
+0 −3
Original line number Diff line number Diff line
@@ -29,9 +29,6 @@ ifdef CONFIG_DRM_AMD_DC_DCN1_0
DC_LIBS += dcn20
DC_LIBS += dsc
DC_LIBS += dcn10 dml
endif

ifdef CONFIG_DRM_AMD_DC_DCN2_1
DC_LIBS += dcn21
endif

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