Commit ad7f9f3a authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Dinh Nguyen
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dt-bindings: clock: intel,stratix10: convert to dtschema 



Convert the Intel Stratix 10 clock controller bindings to DT schema format.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent abca30aa

Documentation/devicetree/bindings/clock/intc_stratix10.txt

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Device Tree Clock bindings for Intel's SoCFPGA Stratix10 platform



This binding uses the common clock binding[1].



[1] Documentation/devicetree/bindings/clock/clock-bindings.txt



Required properties:

- compatible : shall be

	"intel,stratix10-clkmgr"



- reg : shall be the control register offset from CLOCK_MANAGER's base for the clock.



- #clock-cells : from common clock binding, shall be set to 1.



Example:

	clkmgr: clock-controller@ffd10000 {

		compatible = "intel,stratix10-clkmgr";

		reg = <0xffd10000 0x1000>;

		#clock-cells = <1>;

	};

Documentation/devicetree/bindings/clock/intel,stratix10.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/intel,stratix10.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Intel SoCFPGA Stratix10 platform clock controller binding



maintainers:

  - Dinh Nguyen <dinguyen@kernel.org>



properties:

  compatible:

    const: intel,stratix10-clkmgr



  '#clock-cells':

    const: 1



  reg:

    maxItems: 1



required:

  - compatible

  - reg

  - '#clock-cells'



additionalProperties: false



examples:

  - |

    clock-controller@ffd10000 {

        compatible = "intel,stratix10-clkmgr";

        reg = <0xffd10000 0x1000>;

        #clock-cells = <1>;

    };