clk: renesas: r9a07g043: Add TSU clock and reset entry

Add TSU clock and reset entry to CPG driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220501083450.26541-4-biju.das.jz@bp.renesas.com


Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>