Commit b86a1aa3 authored by Bhawanpreet Lakha's avatar Bhawanpreet Lakha Committed by Alex Deucher
Browse files

drm/amd/display: rename DCN1_0 kconfig to DCN 



Since dcn20 and dcn21 are under dcn1 it doesnt make sense to
have it named dcn1.

Change it to "dcn" to make it generic

Signed-off-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent aca935c7

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+1 −1
Original line number Diff line number Diff line
@@ -2598,7 +2598,7 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type) 
	case CHIP_VEGA10:

	case CHIP_VEGA12:

	case CHIP_VEGA20:

#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

#if defined(CONFIG_DRM_AMD_DC_DCN)

	case CHIP_RAVEN:

	case CHIP_NAVI10:

	case CHIP_NAVI14:

drivers/gpu/drm/amd/display/Kconfig

+2 −2
Original line number Diff line number Diff line
@@ -6,13 +6,13 @@ config DRM_AMD_DC 
	bool "AMD DC - Enable new display engine"

	default y

	select SND_HDA_COMPONENT if SND_HDA_CORE

	select DRM_AMD_DC_DCN1_0 if X86 && !(KCOV_INSTRUMENT_ALL && KCOV_ENABLE_COMPARISONS)

	select DRM_AMD_DC_DCN if X86 && !(KCOV_INSTRUMENT_ALL && KCOV_ENABLE_COMPARISONS)

	help

	  Choose this option if you want to use the new display engine

	  support for AMDGPU. This adds required support for Vega and

	  Raven ASICs.



config DRM_AMD_DC_DCN1_0

config DRM_AMD_DC_DCN

	def_bool n

	help

	  Raven, Navi and Renoir family support for display engine

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+4 −4
Original line number Diff line number Diff line
@@ -76,7 +76,7 @@ 
#include <drm/drm_audio_component.h>

#include <drm/drm_hdcp.h>



#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

#if defined(CONFIG_DRM_AMD_DC_DCN)

#include "ivsrcid/dcn/irqsrcs_dcn_1_0.h"



#include "dcn/dcn_1_0_offset.h"
@@ -2190,7 +2190,7 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev) 
	return 0;

}



#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

#if defined(CONFIG_DRM_AMD_DC_DCN)

/* Register IRQ sources and initialize IRQ callbacks */

static int dcn10_register_irq_handlers(struct amdgpu_device *adev)

{
@@ -2751,7 +2751,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) 
			goto fail;

		}

		break;

#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

#if defined(CONFIG_DRM_AMD_DC_DCN)

	case CHIP_RAVEN:

	case CHIP_NAVI12:

	case CHIP_NAVI10:
@@ -2902,7 +2902,7 @@ static int dm_early_init(void *handle) 
		adev->mode_info.num_hpd = 6;

		adev->mode_info.num_dig = 6;

		break;

#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

#if defined(CONFIG_DRM_AMD_DC_DCN)

	case CHIP_RAVEN:

		adev->mode_info.num_crtc = 4;

		adev->mode_info.num_hpd = 4;

drivers/gpu/drm/amd/display/dc/Makefile

+2 −2
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 


DC_LIBS = basics bios calcs clk_mgr dce gpio irq virtual



ifdef CONFIG_DRM_AMD_DC_DCN1_0

ifdef CONFIG_DRM_AMD_DC_DCN

DC_LIBS += dcn20

DC_LIBS += dsc

DC_LIBS += dcn10 dml
@@ -50,7 +50,7 @@ include $(AMD_DC) 
DISPLAY_CORE = dc.o dc_link.o dc_resource.o dc_hw_sequencer.o dc_sink.o \

dc_surface.o dc_link_hwss.o dc_link_dp.o dc_link_ddc.o dc_debug.o dc_stream.o



ifdef CONFIG_DRM_AMD_DC_DCN1_0

ifdef CONFIG_DRM_AMD_DC_DCN

DISPLAY_CORE += dc_vm_helper.o

endif

drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c

+1 −1
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ bool dal_bios_parser_init_cmd_tbl_helper2( 
	case DCE_VERSION_11_22:

		*h = dal_cmd_tbl_helper_dce112_get_table2();

		return true;

#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

#if defined(CONFIG_DRM_AMD_DC_DCN)

	case DCN_VERSION_1_0:

	case DCN_VERSION_1_01:

		*h = dal_cmd_tbl_helper_dce112_get_table2();