Commit bbbf6db5 authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Geert Uytterhoeven
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arm64: dts: renesas: r8a779a0: Fix PMU interrupt 



Should use PPI No.7 for the PMU. Otherwise, the perf command didn't
show any information.

Fixes: 834c310f ("arm64: dts: renesas: Add Renesas R8A779A0 SoC support")
Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210325041949.925777-1-yoshihiro.shimoda.uh@renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 7c472127

arch/arm64/boot/dts/renesas/r8a779a0.dtsi

+1 −4
Original line number Diff line number Diff line
@@ -60,10 +60,7 @@ extalr_clk: extalr { 


	pmu_a76 {

		compatible = "arm,cortex-a76-pmu";

		interrupts-extended = <&gic GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,

				      <&gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,

				      <&gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,

				      <&gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;

		interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;

	};



	/* External SCIF clock - to be overridden by boards that provide it */