Unverified Commit c4558562 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'dt-cleanup-6.5' of... 

Merge tag 'dt-cleanup-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt

Minor improvements in ARM DTS for v6.5

Minor improvements to fix dtbs_check warnings:
1. STE: Align UART nodes with bindings.
2. EN7523: add missing cache properties.

* tag 'dt-cleanup-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
  ARM: dts: en7523: add missing cache properties
  ARM: dts: ste: align UART node name with bindings

Link: https://lore.kernel.org/r/20230517131255.471002-2-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 6a023136 21f47594

arch/arm/boot/dts/en7523.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -81,6 +81,8 @@ cpu1: cpu@1 { 


		L2_0: l2-cache0 {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

	};

arch/arm/boot/dts/ste-dbx5x0.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -852,7 +852,7 @@ spi3: spi@80129000 { 
			status = "disabled";

		};



		serial0: uart@80120000 {

		serial0: serial@80120000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x80120000 0x1000>;

			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
@@ -868,7 +868,7 @@ serial0: uart@80120000 { 
			status = "disabled";

		};



		serial1: uart@80121000 {

		serial1: serial@80121000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x80121000 0x1000>;

			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@@ -884,7 +884,7 @@ serial1: uart@80121000 { 
			status = "disabled";

		};



		serial2: uart@80007000 {

		serial2: serial@80007000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x80007000 0x1000>;

			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;

arch/arm/boot/dts/ste-href.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -45,7 +45,7 @@ bat_therm: thermistor { 
	};



	soc {

		uart@80120000 {

		serial@80120000 {

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&u0_a_1_default>;

			pinctrl-1 = <&u0_a_1_sleep>;
@@ -53,13 +53,13 @@ uart@80120000 { 
		};



		/* This UART is unused and thus left disabled */

		uart@80121000 {

		serial@80121000 {

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&u1rxtx_a_1_default>;

			pinctrl-1 = <&u1rxtx_a_1_sleep>;

		};



		uart@80007000 {

		serial@80007000 {

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&u2rxtx_c_1_default>;

			pinctrl-1 = <&u2rxtx_c_1_sleep>;

arch/arm/boot/dts/ste-hrefprev60.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ button@1 { 


	soc {

		/* Enable UART1 on this board */

		uart@80121000 {

		serial@80121000 {

			status = "okay";

		};

arch/arm/boot/dts/ste-nomadik-nhk15.dts

+1 −1
Original line number Diff line number Diff line
@@ -190,7 +190,7 @@ nomadik_clcd: endpoint { 
		};



		/* Activate RX/TX and CTS/RTS on UART 0 */

		uart0: uart@101fd000 {

		uart0: serial@101fd000 {

			pinctrl-names = "default";

			pinctrl-0 = <&uart0_nhk_mode>;

			status = "okay";