Blackfin: flush caches on SMP when one core calls another via IPI

Sometimes a SMP system will randomly panic at boot.  This is due to caches
being out of sync when one core tries to signal the other.  So when one
core calls another via IPI, flush the data caches.

Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>