Commit d9eb8fea authored by Wenjing Liu's avatar Wenjing Liu Committed by Alex Deucher
Browse files

drm/amd/display: Drop DCN for DP2.x logic 



[Why & How]
DCN guard is not necessary for DP2.x relevant logic.
Drop them.

v2: squash in fix for misplaced #endif (Alex)

Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Reviewed-by: default avatarJerry Zuo <Jerry.Zuo@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarWenjing Liu <wenjing.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 31d64b82

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

+1 −5
Original line number Diff line number Diff line
@@ -797,16 +797,12 @@ void dm_helpers_mst_enable_stream_features(const struct dc_stream_state *stream) 
					 sizeof(new_downspread));

}



#if defined(CONFIG_DRM_AMD_DC_DCN)

void dm_set_phyd32clk(struct dc_context *ctx, int freq_khz)

{

       // FPGA programming for this clock in diags framework that

       // needs to go through dm layer, therefore leave dummy interace here

       // TODO

}





void dm_helpers_enable_periodic_detection(struct dc_context *ctx, bool enable)

{

	/* TODO: add peridic detection implementation */

}
 
#endif

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

+0 −2
Original line number Diff line number Diff line
@@ -1692,7 +1692,6 @@ static enum bp_result bios_parser_get_encoder_cap_info( 
			ATOM_ENCODER_CAP_RECORD_HBR3_EN) ? 1 : 0;

	info->HDMI_6GB_EN = (record->encodercaps &

			ATOM_ENCODER_CAP_RECORD_HDMI6Gbps_EN) ? 1 : 0;

#if defined(CONFIG_DRM_AMD_DC_DCN)

	info->IS_DP2_CAPABLE = (record->encodercaps &

			ATOM_ENCODER_CAP_RECORD_DP2) ? 1 : 0;

	info->DP_UHBR10_EN = (record->encodercaps &
@@ -1701,7 +1700,6 @@ static enum bp_result bios_parser_get_encoder_cap_info( 
			ATOM_ENCODER_CAP_RECORD_UHBR13_5_EN) ? 1 : 0;

	info->DP_UHBR20_EN = (record->encodercaps &

			ATOM_ENCODER_CAP_RECORD_UHBR20_EN) ? 1 : 0;

#endif

	info->DP_IS_USB_C = (record->encodercaps &

			ATOM_ENCODER_CAP_RECORD_USB_C_TYPE) ? 1 : 0;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

+0 −4
Original line number Diff line number Diff line
@@ -338,12 +338,10 @@ static enum bp_result transmitter_control_v1_7( 
	const struct command_table_helper *cmd = bp->cmd_helper;

	struct dmub_dig_transmitter_control_data_v1_7 dig_v1_7 = {0};



#if defined(CONFIG_DRM_AMD_DC_DCN)

	uint8_t hpo_instance = (uint8_t)cntl->hpo_engine_id - ENGINE_ID_HPO_0;



	if (dc_is_dp_signal(cntl->signal))

		hpo_instance = (uint8_t)cntl->hpo_engine_id - ENGINE_ID_HPO_DP_0;

#endif



	dig_v1_7.phyid = cmd->phy_id_to_atom(cntl->transmitter);

	dig_v1_7.action = (uint8_t)cntl->action;
@@ -358,9 +356,7 @@ static enum bp_result transmitter_control_v1_7( 
	dig_v1_7.hpdsel = cmd->hpd_sel_to_atom(cntl->hpd_sel);

	dig_v1_7.digfe_sel = cmd->dig_encoder_sel_to_atom(cntl->engine_id);

	dig_v1_7.connobj_id = (uint8_t)cntl->connector_obj_id.id;

#if defined(CONFIG_DRM_AMD_DC_DCN)

	dig_v1_7.HPO_instance = hpo_instance;

#endif

	dig_v1_7.symclk_units.symclk_10khz = cntl->pixel_clock/10;



	if (cntl->action == TRANSMITTER_CONTROL_ENABLE ||

drivers/gpu/drm/amd/display/dc/core/dc.c

+0 −4
Original line number Diff line number Diff line
@@ -2370,10 +2370,8 @@ static enum surface_update_type check_update_surfaces_for_stream( 
		if (stream_update->dsc_config)

			su_flags->bits.dsc_changed = 1;



#if defined(CONFIG_DRM_AMD_DC_DCN)

		if (stream_update->mst_bw_update)

			su_flags->bits.mst_bw = 1;

#endif



		if (su_flags->raw != 0)

			overall_type = UPDATE_TYPE_FULL;
@@ -2752,14 +2750,12 @@ static void commit_planes_do_stream_update(struct dc *dc, 
			if (stream_update->dsc_config)

				dp_update_dsc_config(pipe_ctx);



#if defined(CONFIG_DRM_AMD_DC_DCN)

			if (stream_update->mst_bw_update) {

				if (stream_update->mst_bw_update->is_increase)

					dc_link_increase_mst_payload(pipe_ctx, stream_update->mst_bw_update->mst_stream_bw);

				else

					dc_link_reduce_mst_payload(pipe_ctx, stream_update->mst_bw_update->mst_stream_bw);

			}

#endif



			if (stream_update->pending_test_pattern) {

				dc_link_dp_set_test_pattern(stream->link,

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+50 −242

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