Commit e47a7f57 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sm8250: rename labels for DSI nodes



Currently in board files MDSS and DSI nodes stay apart, because labels
for DSI nodes do not have the mdss_ prefix. It was found that grouping
all display-related notes is more useful.

To keep all display-related nodes close in the board files, change DSI
node labels from dsi_* to mdss_dsi_*.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531011623.3808538-13-dmitry.baryshkov@linaro.org
parent 8fe25ba3
Loading
Loading
Loading
Loading
+26 −26
Original line number Diff line number Diff line
@@ -535,30 +535,6 @@ &cdsp {
	firmware-name = "qcom/sm8250/cdsp.mbn";
};

&dsi0 {
	status = "okay";
	vdda-supply = <&vreg_l9a_1p2>;

#if 0
	qcom,dual-dsi-mode;
	qcom,master-dsi;
#endif

	ports {
		port@1 {
			endpoint {
				remote-endpoint = <&lt9611_a>;
				data-lanes = <0 1 2 3>;
			};
		};
	};
};

&dsi0_phy {
	status = "okay";
	vdds-supply = <&vreg_l5a_0p88>;
};

&gmu {
	status = "okay";
};
@@ -604,7 +580,7 @@ port@0 {
				reg = <0>;

				lt9611_a: endpoint {
					remote-endpoint = <&dsi0_out>;
					remote-endpoint = <&mdss_dsi0_out>;
				};
			};

@@ -613,7 +589,7 @@ port@1 {
				reg = <1>;

				lt9611_b: endpoint {
					remote-endpoint = <&dsi1_out>;
					remote-endpoint = <&mdss_dsi1_out>;
				};
			};
#endif
@@ -639,6 +615,30 @@ &mdss {
	status = "okay";
};

&mdss_dsi0 {
	status = "okay";
	vdda-supply = <&vreg_l9a_1p2>;

#if 0
	qcom,dual-dsi-mode;
	qcom,master-dsi;
#endif

	ports {
		port@1 {
			endpoint {
				remote-endpoint = <&lt9611_a>;
				data-lanes = <0 1 2 3>;
			};
		};
	};
};

&mdss_dsi0_phy {
	status = "okay";
	vdds-supply = <&vreg_l5a_0p88>;
};

&pm8150_adc {
	xo-therm@4c {
		reg = <ADC5_XO_THERM_100K_PU>;
+20 −20
Original line number Diff line number Diff line
@@ -311,25 +311,6 @@ &cdsp_pas {
	status = "okay";
};

&dsi0 {
	status = "okay";
	vdda-supply = <&vreg_l26a_1p2>;

	ports {
		port@1 {
			endpoint {
				remote-endpoint = <&sn65dsi86_in_a>;
				data-lanes = <0 1 2 3>;
			};
		};
	};
};

&dsi0_phy {
	status = "okay";
	vdds-supply = <&vreg_l1a_0p875>;
};

&gcc {
	protected-clocks = <GCC_QSPI_CORE_CLK>,
			   <GCC_QSPI_CORE_CLK_SRC>,
@@ -422,7 +403,7 @@ ports {
			port@0 {
				reg = <0>;
				sn65dsi86_in_a: endpoint {
					remote-endpoint = <&dsi0_out>;
					remote-endpoint = <&mdss_dsi0_out>;
				};
			};

@@ -475,6 +456,25 @@ &mdss {
	status = "okay";
};

&mdss_dsi0 {
	status = "okay";
	vdda-supply = <&vreg_l26a_1p2>;

	ports {
		port@1 {
			endpoint {
				remote-endpoint = <&sn65dsi86_in_a>;
				data-lanes = <0 1 2 3>;
			};
		};
	};
};

&mdss_dsi0_phy {
	status = "okay";
	vdds-supply = <&vreg_l1a_0p875>;
};

&mss_pil {
	status = "okay";
	firmware-name = "qcom/sdm850/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/sdm850/LENOVO/81JL/qcdsp2850.mbn";
+69 −69
Original line number Diff line number Diff line
@@ -470,75 +470,6 @@ &cdsp {
	status = "okay";
};

&dsi0 {
	vdda-supply = <&vreg_l9a_1p2>;
	qcom,dual-dsi-mode;
	qcom,sync-dual-dsi;
	qcom,master-dsi;
	status = "okay";

	display_panel: panel@0 {
		reg = <0>;
		vddio-supply = <&vreg_l14a_1p88>;
		reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;
		backlight = <&backlight>;

		status = "disabled";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				panel_in_0: endpoint {
					remote-endpoint = <&dsi0_out>;
				};
			};

			port@1{
				reg = <1>;

				panel_in_1: endpoint {
					remote-endpoint = <&dsi1_out>;
				};
			};
		};
	};
};

&dsi0_out {
	data-lanes = <0 1 2>;
	remote-endpoint = <&panel_in_0>;
};

&dsi0_phy {
	vdds-supply = <&vreg_l5a_0p88>;
	phy-type = <PHY_TYPE_CPHY>;
	status = "okay";
};

&dsi1 {
	vdda-supply = <&vreg_l9a_1p2>;
	qcom,dual-dsi-mode;
	qcom,sync-dual-dsi;
	/* DSI1 is slave, so use DSI0 clocks */
	assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
	status = "okay";
};

&dsi1_out {
	data-lanes = <0 1 2>;
	remote-endpoint = <&panel_in_1>;
};

&dsi1_phy {
	vdds-supply = <&vreg_l5a_0p88>;
	phy-type = <PHY_TYPE_CPHY>;
	status = "okay";
};

&gmu {
	status = "okay";
};
@@ -607,6 +538,75 @@ &mdss {
	status = "okay";
};

&mdss_dsi0 {
	vdda-supply = <&vreg_l9a_1p2>;
	qcom,dual-dsi-mode;
	qcom,sync-dual-dsi;
	qcom,master-dsi;
	status = "okay";

	display_panel: panel@0 {
		reg = <0>;
		vddio-supply = <&vreg_l14a_1p88>;
		reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;
		backlight = <&backlight>;

		status = "disabled";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				panel_in_0: endpoint {
					remote-endpoint = <&mdss_dsi0_out>;
				};
			};

			port@1{
				reg = <1>;

				panel_in_1: endpoint {
					remote-endpoint = <&mdss_dsi1_out>;
				};
			};
		};
	};
};

&mdss_dsi0_out {
	data-lanes = <0 1 2>;
	remote-endpoint = <&panel_in_0>;
};

&mdss_dsi0_phy {
	vdds-supply = <&vreg_l5a_0p88>;
	phy-type = <PHY_TYPE_CPHY>;
	status = "okay";
};

&mdss_dsi1 {
	vdda-supply = <&vreg_l9a_1p2>;
	qcom,dual-dsi-mode;
	qcom,sync-dual-dsi;
	/* DSI1 is slave, so use DSI0 clocks */
	assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
	status = "okay";
};

&mdss_dsi1_out {
	data-lanes = <0 1 2>;
	remote-endpoint = <&panel_in_1>;
};

&mdss_dsi1_phy {
	vdds-supply = <&vreg_l5a_0p88>;
	phy-type = <PHY_TYPE_CPHY>;
	status = "okay";
};

&pcie0 {
	status = "okay";
};
+18 −18
Original line number Diff line number Diff line
@@ -4242,14 +4242,14 @@ ports {
					port@0 {
						reg = <0>;
						dpu_intf1_out: endpoint {
							remote-endpoint = <&dsi0_in>;
							remote-endpoint = <&mdss_dsi0_in>;
						};
					};

					port@1 {
						reg = <1>;
						dpu_intf2_out: endpoint {
							remote-endpoint = <&dsi1_in>;
							remote-endpoint = <&mdss_dsi1_in>;
						};
					};
				};
@@ -4279,7 +4279,7 @@ opp-460000000 {
				};
			};

			dsi0: dsi@ae94000 {
			mdss_dsi0: dsi@ae94000 {
				compatible = "qcom,sm8250-dsi-ctrl",
					     "qcom,mdss-dsi-ctrl";
				reg = <0 0x0ae94000 0 0x400>;
@@ -4302,12 +4302,12 @@ dsi0: dsi@ae94000 {
					      "bus";

				assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
				assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
				assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;

				operating-points-v2 = <&dsi_opp_table>;
				power-domains = <&rpmhpd SM8250_MMCX>;

				phys = <&dsi0_phy>;
				phys = <&mdss_dsi0_phy>;

				status = "disabled";

@@ -4320,14 +4320,14 @@ ports {

					port@0 {
						reg = <0>;
						dsi0_in: endpoint {
						mdss_dsi0_in: endpoint {
							remote-endpoint = <&dpu_intf1_out>;
						};
					};

					port@1 {
						reg = <1>;
						dsi0_out: endpoint {
						mdss_dsi0_out: endpoint {
						};
					};
				};
@@ -4352,7 +4352,7 @@ opp-358000000 {
				};
			};

			dsi0_phy: phy@ae94400 {
			mdss_dsi0_phy: phy@ae94400 {
				compatible = "qcom,dsi-phy-7nm";
				reg = <0 0x0ae94400 0 0x200>,
				      <0 0x0ae94600 0 0x280>,
@@ -4371,7 +4371,7 @@ dsi0_phy: phy@ae94400 {
				status = "disabled";
			};

			dsi1: dsi@ae96000 {
			mdss_dsi1: dsi@ae96000 {
				compatible = "qcom,sm8250-dsi-ctrl",
					     "qcom,mdss-dsi-ctrl";
				reg = <0 0x0ae96000 0 0x400>;
@@ -4394,12 +4394,12 @@ dsi1: dsi@ae96000 {
					      "bus";

				assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
				assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
				assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;

				operating-points-v2 = <&dsi_opp_table>;
				power-domains = <&rpmhpd SM8250_MMCX>;

				phys = <&dsi1_phy>;
				phys = <&mdss_dsi1_phy>;

				status = "disabled";

@@ -4412,20 +4412,20 @@ ports {

					port@0 {
						reg = <0>;
						dsi1_in: endpoint {
						mdss_dsi1_in: endpoint {
							remote-endpoint = <&dpu_intf2_out>;
						};
					};

					port@1 {
						reg = <1>;
						dsi1_out: endpoint {
						mdss_dsi1_out: endpoint {
						};
					};
				};
			};

			dsi1_phy: phy@ae96400 {
			mdss_dsi1_phy: phy@ae96400 {
				compatible = "qcom,dsi-phy-7nm";
				reg = <0 0x0ae96400 0 0x200>,
				      <0 0x0ae96600 0 0x280>,
@@ -4451,10 +4451,10 @@ dispcc: clock-controller@af00000 {
			power-domains = <&rpmhpd SM8250_MMCX>;
			required-opps = <&rpmhpd_opp_low_svs>;
			clocks = <&rpmhcc RPMH_CXO_CLK>,
				 <&dsi0_phy 0>,
				 <&dsi0_phy 1>,
				 <&dsi1_phy 0>,
				 <&dsi1_phy 1>,
				 <&mdss_dsi0_phy 0>,
				 <&mdss_dsi0_phy 1>,
				 <&mdss_dsi1_phy 0>,
				 <&mdss_dsi1_phy 1>,
				 <&dp_phy 0>,
				 <&dp_phy 1>;
			clock-names = "bi_tcxo",