Unverified Commit ecff0272 authored by Sergiu Moga's avatar Sergiu Moga Committed by Mark Brown
Browse files

spi: dt-bindings: atmel,at91rm9200-spi: convert to json-schema 



Convert SPI DT binding for Atmel/Microchip SoCs to json-schema.

Signed-off-by: default avatarSergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220713132908.175026-1-sergiu.moga@microchip.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 53415957

Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml

0 → 100644
+75 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries

%YAML 1.2

---

$id: http://devicetree.org/schemas/spi/atmel,at91rm9200-spi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Atmel SPI device



maintainers:

  - Tudor Ambarus <tudor.ambarus@microchip.com>



allOf:

  - $ref: spi-controller.yaml#



properties:

  compatible:

    oneOf:

      - const: atmel,at91rm9200-spi

      - items:

          - const: microchip,sam9x60-spi

          - const: atmel,at91rm9200-spi



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clock-names:

    contains:

      const: spi_clk



  clocks:

    maxItems: 1



  atmel,fifo-size:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      Maximum number of data the RX and TX FIFOs can store for FIFO

      capable SPI controllers.

    enum: [ 16, 32 ]



required:

  - compatible

  - reg

  - interrupts

  - clock-names

  - clocks



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/gpio/gpio.h>

    #include <dt-bindings/interrupt-controller/irq.h>



    spi1: spi@fffcc000 {

        compatible = "atmel,at91rm9200-spi";

        reg = <0xfffcc000 0x4000>;

        interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;

        #address-cells = <1>;

        #size-cells = <0>;

        clocks = <&spi1_clk>;

        clock-names = "spi_clk";

        cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>;

        atmel,fifo-size = <32>;



        mmc@0 {

            compatible = "mmc-spi-slot";

            reg = <0>;

            gpios = <&pioC 4 GPIO_ACTIVE_HIGH>;    /* CD */

            spi-max-frequency = <25000000>;

        };

    };

Documentation/devicetree/bindings/spi/spi_atmel.txt

deleted100644 → 0
+0 −36
Original line number Diff line number Diff line 
Atmel SPI device



Required properties:

- compatible : should be "atmel,at91rm9200-spi" or "microchip,sam9x60-spi".

- reg: Address and length of the register set for the device

- interrupts: Should contain spi interrupt

- cs-gpios: chipselects (optional for SPI controller version >= 2 with the

  Chip Select Active After Transfer feature).

- clock-names: tuple listing input clock names.

	Required elements: "spi_clk"

- clocks: phandles to input clocks.



Optional properties:

- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO

  capable SPI controllers.



Example:



spi1: spi@fffcc000 {

	compatible = "atmel,at91rm9200-spi";

	reg = <0xfffcc000 0x4000>;

	interrupts = <13 4 5>;

	#address-cells = <1>;

	#size-cells = <0>;

	clocks = <&spi1_clk>;

	clock-names = "spi_clk";

	cs-gpios = <&pioB 3 0>;

	atmel,fifo-size = <32>;



	mmc-slot@0 {

		compatible = "mmc-spi-slot";

		reg = <0>;

		gpios = <&pioC 4 0>;	/* CD */

		spi-max-frequency = <25000000>;

	};

};