Commit ed447e7d authored Dec 16, 2020 by Kieran Bingham Committed by Geert Uytterhoeven Dec 28, 2020

clk: renesas: r8a779a0: Add VSPD clock support

Add clocks for the VSPD modules on the V3U.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20201216151931.851547-3-kieran.bingham+renesas@ideasonboard.com

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

parent 0177b509

Show whitespace changes

Inline Side-by-side

Please to comment