Commit ef8e58f8 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Bjorn Andersson
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arm64: dts: qcom: sc7180: Add OPP tables and power-domains for venus 



Add the OPP tables in order to be able to vote on the performance state
of a power-domain

Signed-off-by: default avatarRajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1598970026-7199-6-git-send-email-rnayak@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 13715487

arch/arm64/boot/dts/qcom/sc7180.dtsi

+33 −2
Original line number Original line Diff line number Diff line
@@ -2705,8 +2705,10 @@ venus: video-codec@aa00000 { 
			reg = <0 0x0aa00000 0 0xff000>;

			reg = <0 0x0aa00000 0 0xff000>;

			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;

			power-domains = <&videocc VENUS_GDSC>,

			power-domains = <&videocc VENUS_GDSC>,

					<&videocc VCODEC0_GDSC>;

					<&videocc VCODEC0_GDSC>,

			power-domain-names = "venus", "vcodec0";

					<&rpmhpd SC7180_CX>;

			power-domain-names = "venus", "vcodec0", "cx";

			operating-points-v2 = <&venus_opp_table>;

			clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,

			clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,

				 <&videocc VIDEO_CC_VENUS_AHB_CLK>,

				 <&videocc VIDEO_CC_VENUS_AHB_CLK>,

				 <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,

				 <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
@@ -2727,6 +2729,35 @@ video-decoder { 
			video-encoder {

			video-encoder {

				compatible = "venus-encoder";

				compatible = "venus-encoder";

			};

			};



			venus_opp_table: venus-opp-table {

				compatible = "operating-points-v2";



				opp-150000000 {

					opp-hz = /bits/ 64 <150000000>;

					required-opps = <&rpmhpd_opp_low_svs>;

				};



				opp-270000000 {

					opp-hz = /bits/ 64 <270000000>;

					required-opps = <&rpmhpd_opp_svs>;

				};



				opp-340000000 {

					opp-hz = /bits/ 64 <340000000>;

					required-opps = <&rpmhpd_opp_svs_l1>;

				};



				opp-434000000 {

					opp-hz = /bits/ 64 <434000000>;

					required-opps = <&rpmhpd_opp_nom>;

				};



				opp-500000097 {

					opp-hz = /bits/ 64 <500000097>;

					required-opps = <&rpmhpd_opp_turbo>;

				};

			};

		};

		};





		videocc: clock-controller@ab00000 {

		videocc: clock-controller@ab00000 {