clk: renesas: r9a09g011: Add WDT clock and reset entries

Add WDT0 clock and reset entries to CPG driver.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.kernel.org/r/20220518150105.48167-1-phil.edworthy@renesas.com


Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>