Commit f00f3674 authored by Shaokun Zhang's avatar Shaokun Zhang Committed by Will Deacon
Browse files

arm64: perf: Consistently make all event numbers as 16-bits 



Arm ARM documents PMU event numbers as 16-bits in the table and more 0x4XXX
events have been added in the header file, so use 16-bits for all event
numbers and make them consistent.

No functional change intended.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: default avatarShaokun Zhang <zhangshaokun@hisilicon.com>
Link: https://lore.kernel.org/r/20220303100710.2238-1-zhangshaokun@hisilicon.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 83f83cc0

arch/arm64/include/asm/perf_event.h

+149 −149
Original line number Diff line number Diff line
@@ -15,70 +15,70 @@ 
/*

 * Common architectural and microarchitectural event numbers.

 */

#define ARMV8_PMUV3_PERFCTR_SW_INCR				0x00

#define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL			0x01

#define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL			0x02

#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL			0x03

#define ARMV8_PMUV3_PERFCTR_L1D_CACHE				0x04

#define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL			0x05

#define ARMV8_PMUV3_PERFCTR_LD_RETIRED				0x06

#define ARMV8_PMUV3_PERFCTR_ST_RETIRED				0x07

#define ARMV8_PMUV3_PERFCTR_INST_RETIRED			0x08

#define ARMV8_PMUV3_PERFCTR_EXC_TAKEN				0x09

#define ARMV8_PMUV3_PERFCTR_EXC_RETURN				0x0A

#define ARMV8_PMUV3_PERFCTR_CID_WRITE_RETIRED			0x0B

#define ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED			0x0C

#define ARMV8_PMUV3_PERFCTR_BR_IMMED_RETIRED			0x0D

#define ARMV8_PMUV3_PERFCTR_BR_RETURN_RETIRED			0x0E

#define ARMV8_PMUV3_PERFCTR_UNALIGNED_LDST_RETIRED		0x0F

#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED				0x10

#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES				0x11

#define ARMV8_PMUV3_PERFCTR_BR_PRED				0x12

#define ARMV8_PMUV3_PERFCTR_MEM_ACCESS				0x13

#define ARMV8_PMUV3_PERFCTR_L1I_CACHE				0x14

#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_WB			0x15

#define ARMV8_PMUV3_PERFCTR_L2D_CACHE				0x16

#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_REFILL			0x17

#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_WB			0x18

#define ARMV8_PMUV3_PERFCTR_BUS_ACCESS				0x19

#define ARMV8_PMUV3_PERFCTR_MEMORY_ERROR			0x1A

#define ARMV8_PMUV3_PERFCTR_INST_SPEC				0x1B

#define ARMV8_PMUV3_PERFCTR_TTBR_WRITE_RETIRED			0x1C

#define ARMV8_PMUV3_PERFCTR_BUS_CYCLES				0x1D

#define ARMV8_PMUV3_PERFCTR_CHAIN				0x1E

#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_ALLOCATE			0x1F

#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_ALLOCATE			0x20

#define ARMV8_PMUV3_PERFCTR_BR_RETIRED				0x21

#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED_RETIRED			0x22

#define ARMV8_PMUV3_PERFCTR_STALL_FRONTEND			0x23

#define ARMV8_PMUV3_PERFCTR_STALL_BACKEND			0x24

#define ARMV8_PMUV3_PERFCTR_L1D_TLB				0x25

#define ARMV8_PMUV3_PERFCTR_L1I_TLB				0x26

#define ARMV8_PMUV3_PERFCTR_L2I_CACHE				0x27

#define ARMV8_PMUV3_PERFCTR_L2I_CACHE_REFILL			0x28

#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_ALLOCATE			0x29

#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_REFILL			0x2A

#define ARMV8_PMUV3_PERFCTR_L3D_CACHE				0x2B

#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_WB			0x2C

#define ARMV8_PMUV3_PERFCTR_L2D_TLB_REFILL			0x2D

#define ARMV8_PMUV3_PERFCTR_L2I_TLB_REFILL			0x2E

#define ARMV8_PMUV3_PERFCTR_L2D_TLB				0x2F

#define ARMV8_PMUV3_PERFCTR_L2I_TLB				0x30

#define ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS			0x31

#define ARMV8_PMUV3_PERFCTR_LL_CACHE				0x32

#define ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS			0x33

#define ARMV8_PMUV3_PERFCTR_DTLB_WALK				0x34

#define ARMV8_PMUV3_PERFCTR_ITLB_WALK				0x35

#define ARMV8_PMUV3_PERFCTR_LL_CACHE_RD				0x36

#define ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS_RD			0x37

#define ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS_RD			0x38

#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_LMISS_RD			0x39

#define ARMV8_PMUV3_PERFCTR_OP_RETIRED				0x3A

#define ARMV8_PMUV3_PERFCTR_OP_SPEC				0x3B

#define ARMV8_PMUV3_PERFCTR_STALL				0x3C

#define ARMV8_PMUV3_PERFCTR_STALL_SLOT_BACKEND			0x3D

#define ARMV8_PMUV3_PERFCTR_STALL_SLOT_FRONTEND			0x3E

#define ARMV8_PMUV3_PERFCTR_STALL_SLOT				0x3F

#define ARMV8_PMUV3_PERFCTR_SW_INCR				0x0000

#define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL			0x0001

#define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL			0x0002

#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL			0x0003

#define ARMV8_PMUV3_PERFCTR_L1D_CACHE				0x0004

#define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL			0x0005

#define ARMV8_PMUV3_PERFCTR_LD_RETIRED				0x0006

#define ARMV8_PMUV3_PERFCTR_ST_RETIRED				0x0007

#define ARMV8_PMUV3_PERFCTR_INST_RETIRED			0x0008

#define ARMV8_PMUV3_PERFCTR_EXC_TAKEN				0x0009

#define ARMV8_PMUV3_PERFCTR_EXC_RETURN				0x000A

#define ARMV8_PMUV3_PERFCTR_CID_WRITE_RETIRED			0x000B

#define ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED			0x000C

#define ARMV8_PMUV3_PERFCTR_BR_IMMED_RETIRED			0x000D

#define ARMV8_PMUV3_PERFCTR_BR_RETURN_RETIRED			0x000E

#define ARMV8_PMUV3_PERFCTR_UNALIGNED_LDST_RETIRED		0x000F

#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED				0x0010

#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES				0x0011

#define ARMV8_PMUV3_PERFCTR_BR_PRED				0x0012

#define ARMV8_PMUV3_PERFCTR_MEM_ACCESS				0x0013

#define ARMV8_PMUV3_PERFCTR_L1I_CACHE				0x0014

#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_WB			0x0015

#define ARMV8_PMUV3_PERFCTR_L2D_CACHE				0x0016

#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_REFILL			0x0017

#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_WB			0x0018

#define ARMV8_PMUV3_PERFCTR_BUS_ACCESS				0x0019

#define ARMV8_PMUV3_PERFCTR_MEMORY_ERROR			0x001A

#define ARMV8_PMUV3_PERFCTR_INST_SPEC				0x001B

#define ARMV8_PMUV3_PERFCTR_TTBR_WRITE_RETIRED			0x001C

#define ARMV8_PMUV3_PERFCTR_BUS_CYCLES				0x001D

#define ARMV8_PMUV3_PERFCTR_CHAIN				0x001E

#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_ALLOCATE			0x001F

#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_ALLOCATE			0x0020

#define ARMV8_PMUV3_PERFCTR_BR_RETIRED				0x0021

#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED_RETIRED			0x0022

#define ARMV8_PMUV3_PERFCTR_STALL_FRONTEND			0x0023

#define ARMV8_PMUV3_PERFCTR_STALL_BACKEND			0x0024

#define ARMV8_PMUV3_PERFCTR_L1D_TLB				0x0025

#define ARMV8_PMUV3_PERFCTR_L1I_TLB				0x0026

#define ARMV8_PMUV3_PERFCTR_L2I_CACHE				0x0027

#define ARMV8_PMUV3_PERFCTR_L2I_CACHE_REFILL			0x0028

#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_ALLOCATE			0x0029

#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_REFILL			0x002A

#define ARMV8_PMUV3_PERFCTR_L3D_CACHE				0x002B

#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_WB			0x002C

#define ARMV8_PMUV3_PERFCTR_L2D_TLB_REFILL			0x002D

#define ARMV8_PMUV3_PERFCTR_L2I_TLB_REFILL			0x002E

#define ARMV8_PMUV3_PERFCTR_L2D_TLB				0x002F

#define ARMV8_PMUV3_PERFCTR_L2I_TLB				0x0030

#define ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS			0x0031

#define ARMV8_PMUV3_PERFCTR_LL_CACHE				0x0032

#define ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS			0x0033

#define ARMV8_PMUV3_PERFCTR_DTLB_WALK				0x0034

#define ARMV8_PMUV3_PERFCTR_ITLB_WALK				0x0035

#define ARMV8_PMUV3_PERFCTR_LL_CACHE_RD				0x0036

#define ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS_RD			0x0037

#define ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS_RD			0x0038

#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_LMISS_RD			0x0039

#define ARMV8_PMUV3_PERFCTR_OP_RETIRED				0x003A

#define ARMV8_PMUV3_PERFCTR_OP_SPEC				0x003B

#define ARMV8_PMUV3_PERFCTR_STALL				0x003C

#define ARMV8_PMUV3_PERFCTR_STALL_SLOT_BACKEND			0x003D

#define ARMV8_PMUV3_PERFCTR_STALL_SLOT_FRONTEND			0x003E

#define ARMV8_PMUV3_PERFCTR_STALL_SLOT				0x003F



/* Statistical profiling extension microarchitectural events */

#define	ARMV8_SPE_PERFCTR_SAMPLE_POP				0x4000
@@ -121,91 +121,91 @@ 
#define	ARMV8_MTE_PERFCTR_MEM_ACCESS_CHECKED_WR			0x4026



/* ARMv8 recommended implementation defined event types */

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD			0x40

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR			0x41

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD		0x42

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR		0x43

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_INNER		0x44

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_OUTER		0x45

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WB_VICTIM		0x46

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WB_CLEAN			0x47

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_INVAL			0x48



#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD			0x4C

#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR			0x4D

#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD				0x4E

#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR				0x4F

#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_RD			0x50

#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WR			0x51

#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_REFILL_RD		0x52

#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_REFILL_WR		0x53



#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WB_VICTIM		0x56

#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WB_CLEAN			0x57

#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_INVAL			0x58



#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_REFILL_RD			0x5C

#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_REFILL_WR			0x5D

#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_RD				0x5E

#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_WR				0x5F

#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD			0x60

#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR			0x61

#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_SHARED			0x62

#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_NOT_SHARED		0x63

#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_NORMAL			0x64

#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_PERIPH			0x65

#define ARMV8_IMPDEF_PERFCTR_MEM_ACCESS_RD			0x66

#define ARMV8_IMPDEF_PERFCTR_MEM_ACCESS_WR			0x67

#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_LD_SPEC			0x68

#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_ST_SPEC			0x69

#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_LDST_SPEC		0x6A



#define ARMV8_IMPDEF_PERFCTR_LDREX_SPEC				0x6C

#define ARMV8_IMPDEF_PERFCTR_STREX_PASS_SPEC			0x6D

#define ARMV8_IMPDEF_PERFCTR_STREX_FAIL_SPEC			0x6E

#define ARMV8_IMPDEF_PERFCTR_STREX_SPEC				0x6F

#define ARMV8_IMPDEF_PERFCTR_LD_SPEC				0x70

#define ARMV8_IMPDEF_PERFCTR_ST_SPEC				0x71

#define ARMV8_IMPDEF_PERFCTR_LDST_SPEC				0x72

#define ARMV8_IMPDEF_PERFCTR_DP_SPEC				0x73

#define ARMV8_IMPDEF_PERFCTR_ASE_SPEC				0x74

#define ARMV8_IMPDEF_PERFCTR_VFP_SPEC				0x75

#define ARMV8_IMPDEF_PERFCTR_PC_WRITE_SPEC			0x76

#define ARMV8_IMPDEF_PERFCTR_CRYPTO_SPEC			0x77

#define ARMV8_IMPDEF_PERFCTR_BR_IMMED_SPEC			0x78

#define ARMV8_IMPDEF_PERFCTR_BR_RETURN_SPEC			0x79

#define ARMV8_IMPDEF_PERFCTR_BR_INDIRECT_SPEC			0x7A



#define ARMV8_IMPDEF_PERFCTR_ISB_SPEC				0x7C

#define ARMV8_IMPDEF_PERFCTR_DSB_SPEC				0x7D

#define ARMV8_IMPDEF_PERFCTR_DMB_SPEC				0x7E



#define ARMV8_IMPDEF_PERFCTR_EXC_UNDEF				0x81

#define ARMV8_IMPDEF_PERFCTR_EXC_SVC				0x82

#define ARMV8_IMPDEF_PERFCTR_EXC_PABORT				0x83

#define ARMV8_IMPDEF_PERFCTR_EXC_DABORT				0x84



#define ARMV8_IMPDEF_PERFCTR_EXC_IRQ				0x86

#define ARMV8_IMPDEF_PERFCTR_EXC_FIQ				0x87

#define ARMV8_IMPDEF_PERFCTR_EXC_SMC				0x88



#define ARMV8_IMPDEF_PERFCTR_EXC_HVC				0x8A

#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_PABORT			0x8B

#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_DABORT			0x8C

#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_OTHER			0x8D

#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_IRQ			0x8E

#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_FIQ			0x8F

#define ARMV8_IMPDEF_PERFCTR_RC_LD_SPEC				0x90

#define ARMV8_IMPDEF_PERFCTR_RC_ST_SPEC				0x91



#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_RD			0xA0

#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WR			0xA1

#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_REFILL_RD		0xA2

#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_REFILL_WR		0xA3



#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WB_VICTIM		0xA6

#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WB_CLEAN			0xA7

#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_INVAL			0xA8

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD			0x0040

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR			0x0041

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD		0x0042

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR		0x0043

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_INNER		0x0044

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_OUTER		0x0045

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WB_VICTIM		0x0046

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WB_CLEAN			0x0047

#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_INVAL			0x0048



#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD			0x004C

#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR			0x004D

#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD				0x004E

#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR				0x004F

#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_RD			0x0050

#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WR			0x0051

#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_REFILL_RD		0x0052

#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_REFILL_WR		0x0053



#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WB_VICTIM		0x0056

#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WB_CLEAN			0x0057

#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_INVAL			0x0058



#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_REFILL_RD			0x005C

#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_REFILL_WR			0x005D

#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_RD				0x005E

#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_WR				0x005F

#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD			0x0060

#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR			0x0061

#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_SHARED			0x0062

#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_NOT_SHARED		0x0063

#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_NORMAL			0x0064

#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_PERIPH			0x0065

#define ARMV8_IMPDEF_PERFCTR_MEM_ACCESS_RD			0x0066

#define ARMV8_IMPDEF_PERFCTR_MEM_ACCESS_WR			0x0067

#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_LD_SPEC			0x0068

#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_ST_SPEC			0x0069

#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_LDST_SPEC		0x006A



#define ARMV8_IMPDEF_PERFCTR_LDREX_SPEC				0x006C

#define ARMV8_IMPDEF_PERFCTR_STREX_PASS_SPEC			0x006D

#define ARMV8_IMPDEF_PERFCTR_STREX_FAIL_SPEC			0x006E

#define ARMV8_IMPDEF_PERFCTR_STREX_SPEC				0x006F

#define ARMV8_IMPDEF_PERFCTR_LD_SPEC				0x0070

#define ARMV8_IMPDEF_PERFCTR_ST_SPEC				0x0071

#define ARMV8_IMPDEF_PERFCTR_LDST_SPEC				0x0072

#define ARMV8_IMPDEF_PERFCTR_DP_SPEC				0x0073

#define ARMV8_IMPDEF_PERFCTR_ASE_SPEC				0x0074

#define ARMV8_IMPDEF_PERFCTR_VFP_SPEC				0x0075

#define ARMV8_IMPDEF_PERFCTR_PC_WRITE_SPEC			0x0076

#define ARMV8_IMPDEF_PERFCTR_CRYPTO_SPEC			0x0077

#define ARMV8_IMPDEF_PERFCTR_BR_IMMED_SPEC			0x0078

#define ARMV8_IMPDEF_PERFCTR_BR_RETURN_SPEC			0x0079

#define ARMV8_IMPDEF_PERFCTR_BR_INDIRECT_SPEC			0x007A



#define ARMV8_IMPDEF_PERFCTR_ISB_SPEC				0x007C

#define ARMV8_IMPDEF_PERFCTR_DSB_SPEC				0x007D

#define ARMV8_IMPDEF_PERFCTR_DMB_SPEC				0x007E



#define ARMV8_IMPDEF_PERFCTR_EXC_UNDEF				0x0081

#define ARMV8_IMPDEF_PERFCTR_EXC_SVC				0x0082

#define ARMV8_IMPDEF_PERFCTR_EXC_PABORT				0x0083

#define ARMV8_IMPDEF_PERFCTR_EXC_DABORT				0x0084



#define ARMV8_IMPDEF_PERFCTR_EXC_IRQ				0x0086

#define ARMV8_IMPDEF_PERFCTR_EXC_FIQ				0x0087

#define ARMV8_IMPDEF_PERFCTR_EXC_SMC				0x0088



#define ARMV8_IMPDEF_PERFCTR_EXC_HVC				0x008A

#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_PABORT			0x008B

#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_DABORT			0x008C

#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_OTHER			0x008D

#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_IRQ			0x008E

#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_FIQ			0x008F

#define ARMV8_IMPDEF_PERFCTR_RC_LD_SPEC				0x0090

#define ARMV8_IMPDEF_PERFCTR_RC_ST_SPEC				0x0091



#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_RD			0x00A0

#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WR			0x00A1

#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_REFILL_RD		0x00A2

#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_REFILL_WR		0x00A3



#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WB_VICTIM		0x00A6

#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WB_CLEAN			0x00A7

#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_INVAL			0x00A8



/*

 * Per-CPU PMCR: config reg