powerpc/mm: Add SMP support to no-hash TLB handling
This commit moves the whole no-hash TLB handling out of line into a new tlb_nohash.c file, and implements some basic SMP support using IPIs and/or broadcast tlbivax instructions. Note that I'm using local invalidations for D->I cache coherency. At worst, if another processor is trying to execute the same and has the old entry in its TLB, it will just take a fault and re-do the TLB flush locally (it won't re-do the cache flush in any case). Signed-off-by:Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by:
Kumar Gala <galak@kernel.crashing.org> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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- arch/powerpc/include/asm/highmem.h 2 additions, 2 deletionsarch/powerpc/include/asm/highmem.h
- arch/powerpc/include/asm/mmu.h 16 additions, 0 deletionsarch/powerpc/include/asm/mmu.h
- arch/powerpc/include/asm/tlbflush.h 38 additions, 46 deletionsarch/powerpc/include/asm/tlbflush.h
- arch/powerpc/kernel/misc_32.S 9 additions, 0 deletionsarch/powerpc/kernel/misc_32.S
- arch/powerpc/kernel/ppc_ksyms.c 0 additions, 6 deletionsarch/powerpc/kernel/ppc_ksyms.c
- arch/powerpc/mm/Makefile 1 addition, 1 deletionarch/powerpc/mm/Makefile
- arch/powerpc/mm/fault.c 1 addition, 1 deletionarch/powerpc/mm/fault.c
- arch/powerpc/mm/mem.c 1 addition, 1 deletionarch/powerpc/mm/mem.c
- arch/powerpc/mm/tlb_hash32.c 4 additions, 0 deletionsarch/powerpc/mm/tlb_hash32.c
- arch/powerpc/mm/tlb_nohash.c 209 additions, 0 deletionsarch/powerpc/mm/tlb_nohash.c
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