Commit f3fac948 authored by Wenjing Liu's avatar Wenjing Liu Committed by Alex Deucher
Browse files

drm/amd/display: populate link res in both detection and validation 



[why]
This commit is to populate link res in preparation of the next commit.
The next commit will replace all existing code to use link res instead

Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: default avatarJun Lei <Jun.Lei@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarWenjing Liu <wenjing.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ef30f441

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+6 −3
Original line number Diff line number Diff line
@@ -881,6 +881,7 @@ static bool dc_link_detect_helper(struct dc_link *link, 
	enum dc_connection_type pre_connection_type = dc_connection_none;

	bool perform_dp_seamless_boot = false;

	const uint32_t post_oui_delay = 30; // 30ms

	struct link_resource link_res = { 0 };



	DC_LOGGER_INIT(link->ctx->logger);
@@ -974,8 +975,10 @@ static bool dc_link_detect_helper(struct dc_link *link, 
			}



#if defined(CONFIG_DRM_AMD_DC_DCN)

			if (dp_get_link_encoding_format(&link->reported_link_cap) == DP_128b_132b_ENCODING)

			if (dp_get_link_encoding_format(&link->reported_link_cap) == DP_128b_132b_ENCODING) {

				add_dp_hpo_link_encoder_to_link(link);

				link_res.hpo_dp_link_enc = link->hpo_dp_link_enc;

			}

#endif



			if (link->type == dc_connection_mst_branch) {
@@ -986,7 +989,7 @@ static bool dc_link_detect_helper(struct dc_link *link, 
				 * empty which leads to allocate_mst_payload() has "0"

				 * pbn_per_slot value leading to exception on dc_fixpt_div()

				 */

				dp_verify_mst_link_cap(link, NULL);

				dp_verify_mst_link_cap(link, &link_res);



				/*

				 * This call will initiate MST topology discovery. Which
@@ -1150,7 +1153,7 @@ static bool dc_link_detect_helper(struct dc_link *link, 
			// verify link cap for SST non-seamless boot

			if (!perform_dp_seamless_boot)

				dp_verify_link_cap_with_retries(link,

								NULL,

								&link_res,

								&link->reported_link_cap,

								LINK_TRAINING_MAX_VERIFY_RETRY);

		} else {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+1 −0
Original line number Diff line number Diff line
@@ -2161,6 +2161,7 @@ enum dc_status resource_map_pool_resources( 
					&context->res_ctx, pool,

					pipe_ctx->stream_res.hpo_dp_stream_enc,

					true);

			pipe_ctx->link_res.hpo_dp_link_enc = stream->link->hpo_dp_link_enc;

		}

	}

#endif

drivers/gpu/drm/amd/display/dc/inc/core_types.h

+4 −0
Original line number Diff line number Diff line
@@ -336,7 +336,11 @@ struct plane_resource { 


/* all mappable hardware resources used to enable a link */

struct link_resource {

#if defined(CONFIG_DRM_AMD_DC_DCN)

	struct hpo_dp_link_encoder *hpo_dp_link_enc;

#else

	void *dummy;

#endif

};



union pipe_update_flags {