Commit f890aaac authored by Jonathan Cameron's avatar Jonathan Cameron
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iio: frequency: admv4420: Fix alignment for DMA safety 



____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: b59c0415 ("iio: frequency: admv4420.c: Add support for ADMV4420")
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: default avatarNuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-71-jic23@kernel.org
parent a3e38a55

drivers/iio/frequency/admv4420.c

+1 −1
Original line number Diff line number Diff line
@@ -113,7 +113,7 @@ struct admv4420_state { 
	struct admv4420_n_counter	n_counter;

	enum admv4420_mux_sel		mux_sel;

	struct mutex			lock;

	u8				transf_buf[4] ____cacheline_aligned;

	u8				transf_buf[4] __aligned(IIO_DMA_MINALIGN);

};



static const struct regmap_config admv4420_regmap_config = {