Commits · 0091abc3a621f4acf41e35ea00a4ab4f064c2fb7 · jan.koester / Linux · GitLab

Jun 12, 2017
- drm/i915/cnl: Enable loadgen_select bit for vswing sequence · 0091abc3
  Clint Taylor authored Jun 09, 2017
  0091abc3
- drm/i915/cnl: Implement voltage swing sequence. · cf54ca8b
  Rodrigo Vivi authored Jun 09, 2017
  cf54ca8b
- drm/i915/cnl: Add DDI Buffer translation tables for Cannonlake. · 83fb7ab4
  Rodrigo Vivi authored Jun 09, 2017
  83fb7ab4
- drm/i915/cnl: Add registers related to voltage swing sequences. · 04416108
  Rodrigo Vivi authored Jun 09, 2017
  04416108
- drm/i915: Add MMIO helper for 6 ports with different offsets. · 4557c607
  Rodrigo Vivi authored Jun 09, 2017
  4557c607
- drm/i915/cnl: Initialize PLLs · a927c927
  Rodrigo Vivi authored Jun 09, 2017
  a927c927
- drm/i915: Configure DPLL's for Cannonlake · 8b0f7e06
  Kahola, Mika authored Jun 09, 2017
  8b0f7e06
- drm/i915/cnl: DDI - PLL mapping · 555e38d2
  Rodrigo Vivi authored Jun 09, 2017
  555e38d2
- drm/i915/cnl: Allow dynamic cdclk changes on CNL · d1999e9e
  Rodrigo Vivi authored Jun 09, 2017
  d1999e9e
- drm/i915/cnl: Implement CNL display init/unit sequence · d8d4a512
  Ville Syrjälä authored Jun 09, 2017
  d8d4a512
- drm/i915/cnl: Implement .set_cdclk() for CNL · ef4f7a68
  Ville Syrjälä authored Jun 09, 2017
  ef4f7a68
- drm/i915/cnl: Implement .get_display_clock_speed() for CNL · 945f2672
  Ville Syrjälä authored Jun 09, 2017
  945f2672
- drm/i915: Pass atomic state to backlight enable/disable/set callbacks. · 7d025e08
  Maarten Lankhorst authored Jun 12, 2017
  7d025e08
- drm/i915: Pass connector state to intel_panel_set_backlight_acpi · 90d7cd24
  Maarten Lankhorst authored Jun 12, 2017
  90d7cd24
- drm/i915: Pass crtc_state and connector state to backlight enable/disable functions · b037d58f
  Maarten Lankhorst authored Jun 12, 2017
  b037d58f
- drm/i915: Fix GVT-g PVINFO version compatibility check · 0c8792d0
  Zhenyu Wang authored Jun 09, 2017
  0c8792d0
Jun 09, 2017
- drm/i915/cfl: Coffee Lake reuses Kabylake DMC. · 84cd843e
  Rodrigo Vivi authored Jun 09, 2017
  84cd843e
- drm/i915/huc: Load HuC on Coffee Lake · 5e5d8b66
  Anusha Srivatsa authored Jun 08, 2017
  5e5d8b66
- drm/i915/guc: Load GuC on Coffee Lake · c0f82960
  Anusha Srivatsa authored Jun 08, 2017
  c0f82960
- drm/i915/cfl: Add Coffee Lake PCI IDs for U Sku. · d29fe702
  Anusha Srivatsa authored Jun 08, 2017
  d29fe702
- drm/i915/cfl: Add Coffee Lake PCI IDs for H Sku. · ccfd1321
  Anusha Srivatsa authored Jun 08, 2017
  ccfd1321
- drm/i915/cfl: Add Coffee Lake PCI IDs for S Skus. · b056f8f3
  Anusha Srivatsa authored Jun 08, 2017
  b056f8f3
- drm/i915/glk: Remove the alpha_support flag · 07981f2b
  Ander Conselvan de Oliveira authored Jun 08, 2017
  07981f2b
Jun 08, 2017
- drm/i915/cfl: Introduce Display workarounds for Coffee Lake. · 82525c17
  Rodrigo Vivi authored Jun 08, 2017
  82525c17
- drm/i915/cfl: Coffee Lake uses CNP PCH. · 80937819
  Rodrigo Vivi authored Jun 08, 2017
  80937819
- drm/i915/cfl: Introduce Coffee Lake platform definition. · 71851fa8
  Rodrigo Vivi authored Jun 08, 2017
  71851fa8
- drm/i915: Remove the spin-request during execbuf await_request · 6b567085
  Chris Wilson authored Jun 08, 2017
  6b567085
- drm/i915: Skip adding the request to the signal tree is complete · 735e0eb6
  Chris Wilson authored Jun 08, 2017
  735e0eb6
- drm/i915: Report back whether the irq was armed when adding the waiter · bac2ef4b
  Chris Wilson authored Jun 08, 2017
  bac2ef4b
- drm/i915: Check signaled state after enabling signaling · 9f90ff39
  Chris Wilson authored Jun 08, 2017
  9f90ff39
- drm/i915/guc: Clear enable_guc_loading in case of init failure · c4a89526
  Michel Thierry authored Jun 05, 2017
  c4a89526
- drm/i915: Move the unclaimed mmio detection into the powerwell for KMS · d5553c09
  Chris Wilson authored May 04, 2017
  d5553c09
Jun 07, 2017
- drm/i915: Unify GT* and GT3 definitions · 94829de4
  Rodrigo Vivi authored Jun 06, 2017
  94829de4
- drm/i915: Remove unnecessary PORT3 definition. · a1986f41
  Rodrigo Vivi authored Jun 05, 2017
  a1986f41
- drm/i915/cnl: Also need power well sanitize. · bf9a496a
  Rodrigo Vivi authored Jun 06, 2017
  bf9a496a
- drm/i915/cnl: Add power wells for CNL · 8bcd3dd4
  Ville Syrjälä authored Jun 06, 2017
  8bcd3dd4
- drm/i915/gen10: Set value of Indirect Context Offset for gen10 · 7bd0a2c6
  Michel Thierry authored Jun 06, 2017
  7bd0a2c6
- drm/i915/cnl: Cannonlake has same MOCS table than Skylake. · 1dc0766c
  Rodrigo Vivi authored Jun 06, 2017
  1dc0766c
- drm/i915/cnl: Configure EU slice power gating. · c7ae7e9a
  Rodrigo Vivi authored Jun 06, 2017
  c7ae7e9a
- drm/i915/cnl: Cannonlake has 4 planes (3 sprites) per pipe · 8366be98
  James Irwin authored Jun 06, 2017
  8366be98