- Mar 08, 2018
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Michal Simek authored
zc770 is based board which is extended by FMC/DC cards for SoC validation. FMCs/DCs are supposed to cover all SoC configurations. FMC/DC contains can, i2c, nand uart, spi and usb. Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Reviewed-by:
Rob Herring <robh@kernel.org>
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Michal Simek authored
zc770 is based board which is extended by FMC/DC cards for SoC validation. FMCs/DCs are supposed to cover all SoC configurations. FMC/DC contains ethernet port, can, i2c, sd, qspi, spi, uart and usb. Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Reviewed-by:
Rob Herring <robh@kernel.org>
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Michal Simek authored
The board contains 7z010 with 512MB memory, ethernet, qspi, uart, usbs and sd. But board is not supporting booting from sd card. Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Reviewed-by:
Rob Herring <robh@kernel.org>
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Michal Simek authored
This patch is fixing issue reported by dtc: arch/arm/boot/dts/zynq-microzed.dtb: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Follow trend and use the SPDX License description. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
i2c muxes should described like this. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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- Feb 07, 2018
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Clement Courbet authored
We've measured that we spend ~0.6% of sys cpu time in cpumask_next_and(). It's essentially a joined iteration in search for a non-zero bit, which is currently implemented as a lookup join (find a nonzero bit on the lhs, lookup the rhs to see if it's set there). Implement a direct join (find a nonzero bit on the incrementally built join). Also add generic bitmap benchmarks in the new `test_find_bit` module for new function (see `find_next_and_bit` in [2] and [3] below). For cpumask_next_and, direct benchmarking shows that it's 1.17x to 14x faster with a geometric mean of 2.1 on 32 CPUs [1]. No impact on memory usage. Note that on Arm, the new pure-C implementation still outperforms the old one that uses a mix of C and asm (`find_next_bit`) [3]. [1] Approximate benchmark code: ``` unsigned long src1p[nr_cpumask_longs] = {pattern1}; unsigned long src2p[nr_cpumask_longs] = {pattern2}; for (/*a bunch of repetitions*/) { for (int n = -1; n <= nr_cpu_ids; ++n) { asm volatile("" : "+rm"(src1p)); // prevent any optimization asm volatile("" : "+rm"(src2p)); unsigned long result = cpumask_next_and(n, src1p, src2p); asm volatile("" : "+rm"(result)); } } ``` Results: pattern1 pattern2 time_before/time_after 0x0000ffff 0x0000ffff 1.65 0x0000ffff 0x00005555 2.24 0x0000ffff 0x00001111 2.94 0x0000ffff 0x00000000 14.0 0x00005555 0x0000ffff 1.67 0x00005555 0x00005555 1.71 0x00005555 0x00001111 1.90 0x00005555 0x00000000 6.58 0x00001111 0x0000ffff 1.46 0x00001111 0x00005555 1.49 0x00001111 0x00001111 1.45 0x00001111 0x00000000 3.10 0x00000000 0x0000ffff 1.18 0x00000000 0x00005555 1.18 0x00000000 0x00001111 1.17 0x00000000 0x00000000 1.25 ----------------------------- geo.mean 2.06 [2] test_find_next_bit, X86 (skylake) [ 3913.477422] Start testing find_bit() with random-filled bitmap [ 3913.477847] find_next_bit: 160868 cycles, 16484 iterations [ 3913.477933] find_next_zero_bit: 169542 cycles, 16285 iterations [ 3913.478036] find_last_bit: 201638 cycles, 16483 iterations [ 3913.480214] find_first_bit: 4353244 cycles, 16484 iterations [ 3913.480216] Start testing find_next_and_bit() with random-filled bitmap [ 3913.481074] find_next_and_bit: 89604 cycles, 8216 iterations [ 3913.481075] Start testing find_bit() with sparse bitmap [ 3913.481078] find_next_bit: 2536 cycles, 66 iterations [ 3913.481252] find_next_zero_bit: 344404 cycles, 32703 iterations [ 3913.481255] find_last_bit: 2006 cycles, 66 iterations [ 3913.481265] find_first_bit: 17488 cycles, 66 iterations [ 3913.481266] Start testing find_next_and_bit() with sparse bitmap [ 3913.481272] find_next_and_bit: 764 cycles, 1 iterations [3] test_find_next_bit, arm (v7 odroid XU3). [ 267.206928] Start testing find_bit() with random-filled bitmap [ 267.214752] find_next_bit: 4474 cycles, 16419 iterations [ 267.221850] find_next_zero_bit: 5976 cycles, 16350 iterations [ 267.229294] find_last_bit: 4209 cycles, 16419 iterations [ 267.279131] find_first_bit: 1032991 cycles, 16420 iterations [ 267.286265] Start testing find_next_and_bit() with random-filled bitmap [ 267.302386] find_next_and_bit: 2290 cycles, 8140 iterations [ 267.309422] Start testing find_bit() with sparse bitmap [ 267.316054] find_next_bit: 191 cycles, 66 iterations [ 267.322726] find_next_zero_bit: 8758 cycles, 32703 iterations [ 267.329803] find_last_bit: 84 cycles, 66 iterations [ 267.336169] find_first_bit: 4118 cycles, 66 iterations [ 267.342627] Start testing find_next_and_bit() with sparse bitmap [ 267.356919] find_next_and_bit: 91 cycles, 1 iterations [courbet@google.com: v6] Link: http://lkml.kernel.org/r/20171129095715.23430-1-courbet@google.com [geert@linux-m68k.org: m68k/bitops: always include <asm-generic/bitops/find.h>] Link: http://lkml.kernel.org/r/1512556816-28627-1-git-send-email-geert@linux-m68k.org Link: http://lkml.kernel.org/r/20171128131334.23491-1-courbet@google.com Signed-off-by:
Clement Courbet <courbet@google.com> Signed-off-by:
Geert Uytterhoeven <geert@linux-m68k.org> Cc: Yury Norov <ynorov@caviumnetworks.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Alexey Dobriyan <adobriyan@gmail.com> Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Feb 06, 2018
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Marc Zyngier authored
A new feature of SMCCC 1.1 is that it offers firmware-based CPU workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides BP hardening for CVE-2017-5715. If the host has some mitigation for this issue, report that we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the host workaround on every guest exit. Tested-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by:
Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Marc Zyngier authored
The new SMC Calling Convention (v1.1) allows for a reduced overhead when calling into the firmware, and provides a new feature discovery mechanism. Make it visible to KVM guests. Tested-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by:
Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Marc Zyngier authored
As we're about to update the PSCI support, and because I'm lazy, let's move the PSCI include file to include/kvm so that both ARM architectures can find it. Acked-by:
Christoffer Dall <christoffer.dall@linaro.org> Tested-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Marc Zyngier authored
KVM doesn't follow the SMCCC when it comes to unimplemented calls, and inject an UNDEF instead of returning an error. Since firmware calls are now used for security mitigation, they are becoming more common, and the undef is counter productive. Instead, let's follow the SMCCC which states that -1 must be returned to the caller when getting an unknown function number. Cc: <stable@vger.kernel.org> Tested-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- Feb 02, 2018
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Ulf Magnusson authored
Blank help texts are probably either a typo, a Kconfig misunderstanding, or some kind of half-committing to adding a help text (in which case a TODO comment would be clearer, if the help text really can't be added right away). Best to remove them, IMO. Signed-off-by:
Ulf Magnusson <ulfalizer@gmail.com> Acked-by:
Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- Feb 01, 2018
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Kirill A. Shutemov authored
ARM LPAE doesn't have hardware dirty/accessed bits. generic_pmdp_establish() is the right implementation of pmdp_establish for this case. Link: http://lkml.kernel.org/r/20171213105756.69879-4-kirill.shutemov@linux.intel.com Signed-off-by:
Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Vlastimil Babka <vbabka@suse.cz> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: Michal Hocko <mhocko@kernel.org> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Jan 27, 2018
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Daniel Borkmann authored
Since we've changed div/mod exception handling for src_reg in eBPF verifier itself, remove the leftovers from arm32 JIT. Signed-off-by:
Daniel Borkmann <daniel@iogearbox.net> Cc: Shubham Bansal <illusionist.neo@gmail.com> Signed-off-by:
Alexei Starovoitov <ast@kernel.org>
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- Jan 25, 2018
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Benjamin Gilbert authored
It doesn't actually do anything. Merge its help text into EXTRA_FIRMWARE. Fixes: 5620a0d1 ("firmware: delete in-kernel firmware") Fixes: 0946b2fb ("firmware: cleanup FIRMWARE_IN_KERNEL message") Signed-off-by:
Benjamin Gilbert <benjamin.gilbert@coreos.com> Signed-off-by:
Robin H. Johnson <robbat2@gentoo.org> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- Jan 24, 2018
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Marc Zyngier authored
CONFIG_IRQ_DOMAIN_DEBUG is similar to CONFIG_GENERIC_IRQ_DEBUGFS, just with less information. Spring cleanup time. Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com> Signed-off-by:
Thomas Gleixner <tglx@linutronix.de> Cc: Yang Shunyong <shunyong.yang@hxt-semitech.com> Link: https://lkml.kernel.org/r/20180117142647.23622-1-marc.zyngier@arm.com
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Sebastian Reichel authored
This adds support for the Marvell switch and names the network ports according to the labels, that can be found next to the connectors. The switch is connected to the host system using a PCI based network card. The PCI bus configuration has been written using the following information: root@b450v3# lspci -tv -[0000:00]---00.0-[01]----00.0 Intel Corporation I210 Gigabit Network Connection root@b450v3# lspci -nn 00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01) 01:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03) Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Reviewed-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Sebastian Reichel authored
This adds support for the Marvell switch and names the network ports according to the labels, that can be found next to the connectors. The switch is connected to the host system using a PCI based network card. The PCI bus configuration has been written using the following information: root@b650v3# lspci -tv -[0000:00]---00.0-[01]----00.0 Intel Corporation I210 Gigabit Network Connection root@b650v3# lspci -nn 00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01) 01:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03) Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Reviewed-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Sebastian Reichel authored
This adds support for the Marvell switch and names the network ports according to the labels, that can be found next to the connectors ("ID", "IX", "ePort 1", "ePort 2"). The switch is connected to the host system using a PCI based network card. The PCI bus configuration has been written using the following information: root@b850v3# lspci -tv -[0000:00]---00.0-[01]----00.0-[02-05]--+-01.0-[03]----00.0 Intel Corporation I210 Gigabit Network Connection +-02.0-[04]----00.0 Intel Corporation I210 Gigabit Network Connection \-03.0-[05]-- root@b850v3# lspci -nn 00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01) 01:00.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab) 02:01.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab) 02:02.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab) 02:03.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab) 03:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03) 04:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03) Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Reviewed-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Sebastian Reichel authored
B850v3, B650v3 and B450v3 all have a GPIO bit banged MDIO bus to communicate with a Marvell switch. On all devices the switch is connected to a PCI based network card, which needs to be referenced by DT, so this also adds the common PCI root node. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Reviewed-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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- Jan 23, 2018
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Luis de Bethencourt authored
The trailing semicolon is an empty statement that does no operation. Removing it since it doesn't do anything. Signed-off-by:
Luis de Bethencourt <luisbg@kernel.org> Signed-off-by:
Christoffer Dall <christoffer.dall@linaro.org>
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Tim Sander authored
Add the reset signals for the i2c controllers on Cyclone5-based SoCFPGA boards to the dtsi. Signed-off-by:
Tim Sander <tim.sander@hbm.com> Signed-off-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by:
Dinh Nguyen <dinguyen@kernel.org>
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Dinh Nguyen authored
The USB host functionality on the Arria10 needs the disable-over-current property. Signed-off-by:
Dinh Nguyen <dinguyen@kernel.org>
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Eric W. Biederman authored
There are so many places that build struct siginfo by hand that at least one of them is bound to get it wrong. A handful of cases in the kernel arguably did just that when using the errno field of siginfo to pass no errno values to userspace. The usage is limited to a single si_code so at least does not mess up anything else. Encapsulate this questionable pattern in a helper function so that the userspace ABI is preserved. Update all of the places that use this pattern to use the new helper function. Signed-off-by:
"Eric W. Biederman" <ebiederm@xmission.com>
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- Jan 22, 2018
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Arnd Bergmann authored
Older compilers choose not to inline _setup_clkctrl_provider(), leading to a harmless warning: WARNING: vmlinux.o(.text+0x27b34): Section mismatch in reference from the function _setup_clkctrl_provider() to the function .init.text:memblock_virt_alloc_try_nid() The function _setup_clkctrl_provider() references the function __init memblock_virt_alloc_try_nid(). This is often because _setup_clkctrl_provider lacks a __init annotation or the annotation of memblock_virt_alloc_try_nid is wrong. This annotates it as __init as well, which lets the linker see that it is actually correct. Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Without this tag, we get a build warning: WARNING: modpost: missing MODULE_LICENSE() in arch/arm/mach-pxa/tosa-bt.o For completeness, I'm also adding author and description fields. Acked-by:
Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Jan 21, 2018
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Nicolas Pitre authored
The __memzero assembly code is almost identical to memset's except for two orr instructions. The runtime performance of __memset(p, n) and memset(p, 0, n) is accordingly almost identical. However, the memset() macro used to guard against a zero length and to call __memzero at compile time when the fill value is a constant zero interferes with compiler optimizations. Arnd found tha the test against a zero length brings up some new warnings with gcc v8: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82103 And successively rremoving the test against a zero length and the call to __memzero optimization produces the following kernel sizes for defconfig with gcc 6: text data bss dec hex filename 12248142 6278960 413588 18940690 1210312 vmlinux.orig 12244474 6278960 413588 18937022 120f4be vmlinux.no_zero_test 12239160 6278960 413588 18931708 120dffc vmlinux.no_memzero So it is probably not worth keeping __memzero around given that the compiler can do a better job at inlining trivial memset(p,0,n) on its own. And the memset code already handles a zero length just fine. Suggested-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Nicolas Pitre <nico@linaro.org> Acked-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk>
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Arnd Bergmann authored
Discarding the memblock arrays usually works, but causes problems with kexec, as pointed out by this kbuild warning: WARNING: vmlinux.o(.text+0x7c60): Section mismatch in reference from the function machine_kexec_prepare() to the function .meminit.text:memblock_is_region_memory() This lets us keep the memblock structures around whenever kexec is enabled, but otherwise still drops them. Fixes: cf1b0990 ("ARM: 8693/1: discard memblock arrays when possible") Acked-by:
Nicolas Pitre <nico@linaro.org> Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk>
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Arnd Bergmann authored
Without this tag, we get a build warning: WARNING: modpost: missing MODULE_LICENSE() in arch/arm/common/bL_switcher_dummy_if.o For completeness, I'm also adding author and description fields. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk>
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Jinbum Park authored
refcount_t overflow detection is implemented as two way. 1. REFCOUNT_FULL - It means the full refcount_t implementation which has validation but is slightly slower. - (fd25d19f ("locking/refcount: Create unchecked atomic_t implementation")) 2. ARCH_HAS_REFCOUNT - refcount_t overflow detection can be optimized via an arch-dependent way. - It is based on atomic_t infrastructure with some instruction added for detection. - It is faster than REFCOUNT_FULL, as fast as unprotected atomic_t infrastructure. - (7a46ec0e ("locking/refcounts, x86/asm: Implement fast refcount overflow protection")) ARCH_HAS_REFCOUNT has implemented for x86, not implemented for others. In the case of arm64, Will Deacon said he didn't want the specialized "fast but technically incomplete" refcounting as seen with x86's. But rather to set REFCOUNT_FULL by default because no one could point to real-world performance impacts with REFCOUNT_FULL vs unprotected atomic_t infrastructure. This is the reason arm64 ended up enabling REFCOUNT_FULL. (4adcec11 ("arm64: Always use REFCOUNT_FULL")) As with the decision of arm64, arm can set REFCOUNT_FULL by default. Acked-by:
Kees Cook <keescook@chromium.org> Signed-off-by:
Jinbum Park <jinb.park7@gmail.com> Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk>
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Arnd Bergmann authored
The new conditionally compiled code leaves some labels and one variable unreferenced when CONFIG_HOTPLUG_CPU and CONFIG_PM_SLEEP are disabled: arch/arm/mm/cache-b15-rac.c: In function 'b15_rac_init': arch/arm/mm/cache-b15-rac.c:353:1: error: label 'out_unmap' defined but not used [-Werror=unused-label] out_unmap: ^~~~~~~~~ arch/arm/mm/cache-b15-rac.c:351:1: error: label 'out_cpu_dead' defined but not used [-Werror=unused-label] out_cpu_dead: ^~~~~~~~~~~~ At top level: arch/arm/mm/cache-b15-rac.c:53:12: error: 'rac_config0_reg' defined but not used [-Werror=unused-variable] This replaces the existing #ifdef conditionals with IS_ENABLED() checks that let the compiler figure out for itself which code to drop. Fixes: 55de8877 ("ARM: 8726/1: B15: Add CPU hotplug awareness") Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk>
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Vladimir Murzin authored
adjust_lowmem_bounds() called twice which can lead to stalled data (i.e. subreg) value in mem[] array after the first call. Zero out mem[] array before we allocate MPU regions for memory. Fixes: 5c9d9a1b ("ARM: 8712/1: NOMMU: Use more MPU regions to cover memory") Signed-off-by:
Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk>
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Vladimir Murzin authored
With switch to dynamic exception base address setting, VBAR/Hivecs set only for boot CPU, but secondaries stay unaware of that. That might lead to weird effects when trying up to bring up secondaries. Fixes: ad475117 ("ARM: 8649/2: nommu: remove Hivecs configuration is asm") Signed-off-by:
Vladimir Murzin <vladimir.murzin@arm.com> Acked-by:
afzal mohammed <afzal.mohd.ma@gmail.com> Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk>
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Vladimir Murzin authored
While running MPS2 platform (NOMMU) with DTB placed below PHYS_OFFSET following warning poped up: ------------[ cut here ]------------ WARNING: CPU: 0 PID: 0 at arch/arm/mm/physaddr.c:42 __virt_to_phys+0x2f/0x40 virt_to_phys used for non-linear address: 00004000 (0x4000) CPU: 0 PID: 0 Comm: swapper Not tainted 4.15.0-rc1-5a31bf2-clean+ #2767 Hardware name: MPS2 (Device Tree Support) [<2100bf39>] (unwind_backtrace) from [<2100b3ff>] (show_stack+0xb/0xc) [<2100b3ff>] (show_stack) from [<2100e697>] (__warn+0x87/0xac) [<2100e697>] (__warn) from [<2100e6db>] (warn_slowpath_fmt+0x1f/0x28) [<2100e6db>] (warn_slowpath_fmt) from [<2100c603>] (__virt_to_phys+0x2f/0x40) [<2100c603>] (__virt_to_phys) from [<2116a499>] (early_init_fdt_reserve_self+0xd/0x24) [<2116a499>] (early_init_fdt_reserve_self) from [<2116222d>] (arm_memblock_init+0xb5/0xf8) [<2116222d>] (arm_memblock_init) from [<21161cad>] (setup_arch+0x38b/0x50e) [<21161cad>] (setup_arch) from [<21160455>] (start_kernel+0x31/0x280) [<21160455>] (start_kernel) from [<00000000>] ( (null)) random: get_random_bytes called from init_oops_id+0x17/0x2c with crng_init=0 ---[ end trace 0000000000000000 ]--- Platforms without MMU support run with 1:1 (i.e. linear) memory mapping, so disable CONFIG_DEBUG_VIRTUAL. Fixes: e377cd82 ("ARM: 8640/1: Add support for CONFIG_DEBUG_VIRTUAL") Signed-off-by:
Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk>
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Jinbum Park authored
Page mappings with full RWX permissions are a security risk. x86, arm64 has an option to walk the page tables and dump any bad pages. (1404d6f1 ("arm64: dump: Add checking for writable and exectuable pages")) Add a similar implementation for arm. Reviewed-by:
Kees Cook <keescook@chromium.org> Tested-by:
Laura Abbott <labbott@redhat.com> Reviewed-by:
Laura Abbott <labbott@redhat.com> Signed-off-by:
Jinbum Park <jinb.park7@gmail.com> Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk>
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Jinbum Park authored
This patch makes the page table dumping seq_file optional. It makes the page table dumping code usable for other cases. This patch refers below commit of arm64. (ae5d1cf3 ("arm64: dump: Make the page table dumping seq_file optional")) Reviewed-by:
Kees Cook <keescook@chromium.org> Tested-by:
Laura Abbott <labbott@redhat.com> Reviewed-by:
Laura Abbott <labbott@redhat.com> Acked-by:
Kees Cook <keescook@chromium.org> Signed-off-by:
Jinbum Park <jinb.park7@gmail.com> Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk>
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Jinbum Park authored
This patch refactors the arm page table dumping code, so multiple tables may be registered with the framework. This patch refers below commits of arm64. (4674fdb9 ("arm64: mm: dump: make page table dumping reusable")) (4ddb9bf8 ("arm64: dump: Make ptdump debugfs a separate option")) Reviewed-by:
Kees Cook <keescook@chromium.org> Tested-by:
Laura Abbott <labbott@redhat.com> Reviewed-by:
Laura Abbott <labbott@redhat.com> Signed-off-by:
Jinbum Park <jinb.park7@gmail.com> Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk>
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- Jan 20, 2018
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Daniel Borkmann authored
Having a pure_initcall() callback just to permanently enable BPF JITs under CONFIG_BPF_JIT_ALWAYS_ON is unnecessary and could leave a small race window in future where JIT is still disabled on boot. Since we know about the setting at compilation time anyway, just initialize it properly there. Also consolidate all the individual bpf_jit_enable variables into a single one and move them under one location. Moreover, don't allow for setting unspecified garbage values on them. Signed-off-by:
Daniel Borkmann <daniel@iogearbox.net> Acked-by:
Alexei Starovoitov <ast@kernel.org> Signed-off-by:
Alexei Starovoitov <ast@kernel.org>
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- Jan 19, 2018
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Pavel Machek authored
This adds support for volume up/down keys in the dts. Signed-off-by:
Pavel Machek <pavel@ucw.cz> Reviewed-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Arnd Bergmann authored
The clcd device is lacking an interrupt-parent property, which makes the interrupt unusable and shows up as a warning with the latest dtc version: arch/arm/boot/dts/ste-nomadik-s8815.dtb: Warning (interrupts_property): Missing interrupt-parent for /amba/clcd@10120000 arch/arm/boot/dts/ste-nomadik-nhk15.dtb: Warning (interrupts_property): Missing interrupt-parent for /amba/clcd@10120000 I looked up the old board files and found that this interrupt has the same irqchip as all the other on-chip device, it just needs one extra line. Fixes: 17470b7d ("ARM: dts: add the CLCD LCD display to the NHK15") Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Cc: stable@vger.kernel.org Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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