- Sep 21, 2009
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Anand Gadiyar authored
trivial: fix typo "for for" in multiple files Signed-off-by:
Anand Gadiyar <gadiyar@ti.com> Signed-off-by:
Jiri Kosina <jkosina@suse.cz>
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- Sep 17, 2009
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Barry Song authored
Signed-off-by:
Barry Song <barry.song@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Yi Li authored
Signed-off-by:
Yi Li <yi.li@analog.com> Signed-off-by:
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Barry Song authored
The board has some parallel flash hooked up to the async banks, so add appropriate physmap resources for it. Signed-off-by:
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Mike Frysinger authored
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Michael Hennerich authored
Latest smc91x driver allows you to specify settings in board resources rather than needing CONFIG_BLACKFIN in the drivers/net/smc91x.h header. Signed-off-by:
Michael Hennerich <michael.hennerich@analog.com> Signed-off-by:
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Barry Song authored
Add the bf538 version of bfin_clear_PPI_STATUS() to match all other ports. Signed-off-by:
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- Jul 20, 2009
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Sonic Zhang authored
The Blackfin serial headers were inverting the CTS value leading to wrong handling of the CTS line which broke CTS/RTS handling completely. Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com> Signed-off-by:
Alan Cox <alan@linux.intel.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Jul 16, 2009
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Sonic Zhang authored
The Blackfin serial headers were inverting the CTS value leading to wrong handling of the CTS line which broke CTS/RTS handling completely. Signed-off-by:
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Graf Yang authored
Signed-off-by:
Graf Yang <graf.yang@analog.com> Signed-off-by:
Cliff Cai <cliff.cai@analog.com> Signed-off-by:
Robin Getz <robin.getz@analog.com> Signed-off-by:
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- Jun 23, 2009
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Mike Frysinger authored
Many aspects of the Blackfin memory map is exactly the same across all variants. Rather than copy and paste all of these duplicated values in each header, unify all of these into the common Blackfin memory map header file. In the process, push down BF561 SMP specific stuff to the BF561 specific header to keep the noise down. Signed-off-by: -
Mike Frysinger authored
Update anomaly headers to match latest released anomaly sheets. Signed-off-by:
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- Jun 13, 2009
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Yi Li authored
The Blackfin SPI driver can be driven by an IRQ now, so declare it in the board resources. Signed-off-by:
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- Jun 12, 2009
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Graf Yang authored
For systems where the core cycles are not a usable tick source (like SMP or cycles gets updated), enable gptimer0 as an alternative. Signed-off-by:
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Graf Yang authored
Add some defines to make the BF538/BF561 look like most other Blackfin parts in that it has a MDMA0 channel available for low level init. Signed-off-by:
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Mike Frysinger authored
Signed-off-by:
Bryan Wu <cooloney@kernel.org>
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Mariusz Kozlowski authored
Signed-off-by:
Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by:
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- Apr 07, 2009
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Sonic Zhang authored
Both software emulated and hardware based CTS and RTS are enabled in serial driver. The CTS RTS PIN connection on BF548 UART port is defined as a modem device not as a host device. In order to test it under Linux, please nake a cross UART cable to exchange CTS and RTS signal. Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by:
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- Mar 05, 2009
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Mike Frysinger authored
Signed-off-by:
Mike Frysinger <vapier.adi@gmail.com> Signed-off-by:
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- Mar 04, 2009
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Mike Frysinger authored
Signed-off-by:
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- Mar 03, 2009
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Tom Parker authored
I have a system where UART0 is configured with hardware flow control, but UART1 doesn't have it enabled. Attempting to access UART1 in this configuration results in the following error in dmesg: <3>bfin-gpio: GPIO 0 is already reserved as Peripheral by bfin-uart ! <5>Stack from 0082bc7c: <5> 0082bc88 00404dd6 00000003 00000000 0054051e 004079da 0082bcb4 00000000 <5> 00000003 00000000 0052686c 0113f2a0 005fa3f0 00000032 20515249 00003035 <5> 00427228 00526e50 0113f2e0 005fa3f0 00000032 0113f2e0 0054b748 0000ffff <5> 22222222 22222222 004e1628 00427304 00000000 00000032 00000023 0054b748 <5> 00487a94 0054b7e8 0054b748 0000000b 00487fb8 0054b748 0054b748 00000001 <5> 0000000a 005fa3f0 009d4fe8 0101e3c0 0054b748 005fa3f0 0050b134 0054b748 <5> <5>Call Trace: <4>[<00485c16>] _uart_startup+0x56/0x178 <4>[<004865c8>] _uart_open+0x40/0x3e0 <4>[<0048661c>] _uart_open+0x94/0x3e0 <4>[<0047f1ce>] _init_dev+0x1fa/0x450 <4>[<004e1628>] ___mutex_unlock_slowpath+0x30/0xe8 <4>[<004815da>] _tty_open+0xf6/0x21c <4>[<0043dab0>] ___path_lookup_intent_open+0x34/0x7c <4>[<004375e4>] _chrdev_open+0x7c/0x134 <4>[<0043dc2c>] _open_namei+0x60/0x568 <4>[<00433fa2>] ___dentry_open+0x9e/0x188 <4>[<00437568>] _chrdev_open+0x0/0x134 <4>[<0043410c>] _nameidata_to_filp+0x30/0x3c <4>[<00434152>] _do_filp_open+0x3a/0x44 <4>[<00408826>] _task_running_tick+0x102/0x278 <4>[<0043418e>] _do_sys_open+0x32/0xac <4>[<0043ede4>] _sys_ioctl+0x28/0x50 <4>[<0043edbc>] _sys_ioctl+0x0/0x50 <4>[<00434224>] _sys_open+0x18/0x20 <4>[<0043420c>] _sys_open+0x0/0x20 <4>[<00418174>] _sys_setuid+0x0/0xc8 This is because the #ifdef's in bfin_serial_5xx.h are messed up. More specifically, they add/remove the uart_{rts,cts}_pin fields in bfin_serial_resources based on whether the particular port has rts/cts enabled, as opposed to when either port has it enabled. This patch fixed this. Signed-off-by:Tom Parker <blackfin@tevp.net> Signed-off-by:
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Mike Frysinger authored
make sure ANOMALY_05000278/ANOMALY_05000380 is defined for all parts Signed-off-by:
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- Feb 04, 2009
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Sonic Zhang authored
[Mike Frysinger <vapier.adi@gmail.com>: - setup P_DEFAULT_BOOT_SPI_CS for every arch based on the default bootrom behavior and convert all our boards to it - revert previous anomaly change ... bf51x is not affected by anomaly 05000353] Signed-off-by:
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- Jan 07, 2009
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Yi Li authored
[Mike Frysinger <vapier.adi@gmail.com>: - handle bf531/bf532/bf534/bf536 variants in ipipe.h - cleanup IPIPE logic for bfin_set_irq_handler() - cleanup ipipe asm code a bit and add missing ENDPROC() - simplify IPIPE code in trap_c - unify some of the IPIPE code and fix style - simplify DO_IRQ_L1 handling with ipipe code - revert IRQ_SW_INT# addition from ipipe merge - remove duplicate get_{c,s}clk() prototypes ] Signed-off-by: -
Mike Frysinger authored
Signed-off-by:
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Graf Yang authored
Signed-off-by:
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Graf Yang authored
Signed-off-by:
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Mike Frysinger authored
Signed-off-by:
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Mike Frysinger authored
Signed-off-by:
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Mike Frysinger authored
Signed-off-by:
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Graf Yang authored
1. Use inline get_l1_... functions instead of macro 2. Fix compile issue about smp barrier functions Signed-off-by:
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Michael Hennerich authored
Signed-off-by:
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Michael Hennerich authored
- remove duplicated code and headers - add option allowing arbitrary SDRAM/DDR Timing parameters. - mark automatically calculated timings as EXPERIMENTAL - fix comment header block Related to BUGs: - kernel boot up fails with CONFIG_BFIN_KERNEL_CLOCK item on. - kernel does not boot if re-program clocks [ Mike Frysinger <vapier.adi@gmail.com> - fix comment header - mark do_sync static - document the DMA shutdown - simplify SIC_IWR handling - fix ANOMALY_05000265 handling to work as intended ] Signed-off-by:
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Mike Frysinger authored
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- Nov 18, 2008
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Mike Frysinger authored
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Mike Frysinger authored
move irq related functions into asm/irq.h and out of the mondo asm/system.h Signed-off-by:
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Mike Frysinger authored
Delay PLL_CTL/VR_CTL wrappers as much as possible to avoid the inter-dependency problems with cdef and common headers Signed-off-by:
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Mike Frysinger authored
Cc: Graf Yang <graf.yang@analog.com> Signed-off-by:
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- Jan 07, 2009
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Graf Yang authored
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to some other misc code Singed-off-by:
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- Oct 28, 2008
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Mike Frysinger authored
Signed-off-by:
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