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  1. May 23, 2019
    • Ard Biesheuvel's avatar
      arm64/module: deal with ambiguity in PRELxx relocation ranges · 1cf24a2c
      Ard Biesheuvel authored
      
      The R_AARCH64_PREL16 and R_AARCH64_PREL32 relocations are
      documented as permitting a range of [-2^15 .. 2^16), resp.
      [-2^31 .. 2^32). It is also documented that this means we
      cannot detect overflow in some cases, which is bad.
      
      Since we always interpret the targets of these relocations as
      signed quantities (e.g., in the ksymtab handling code), let's
      tighten the overflow checks so that targets that are out of
      range for our signed interpretation of the relocated quantity
      get flagged.
      
      Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      1cf24a2c
    • Ard Biesheuvel's avatar
      arm64/kernel: kaslr: reduce module randomization range to 2 GB · b2eed9b5
      Ard Biesheuvel authored
      
      The following commit
      
        7290d580 ("module: use relative references for __ksymtab entries")
      
      updated the ksymtab handling of some KASLR capable architectures
      so that ksymtab entries are emitted as pairs of 32-bit relative
      references. This reduces the size of the entries, but more
      importantly, it gets rid of statically assigned absolute
      addresses, which require fixing up at boot time if the kernel
      is self relocating (which takes a 24 byte RELA entry for each
      member of the ksymtab struct).
      
      Since ksymtab entries are always part of the same module as the
      symbol they export, it was assumed at the time that a 32-bit
      relative reference is always sufficient to capture the offset
      between a ksymtab entry and its target symbol.
      
      Unfortunately, this is not always true: in the case of per-CPU
      variables, a per-CPU variable's base address (which usually differs
      from the actual address of any of its per-CPU copies) is allocated
      in the vicinity of the ..data.percpu section in the core kernel
      (i.e., in the per-CPU reserved region which follows the section
      containing the core kernel's statically allocated per-CPU variables).
      
      Since we randomize the module space over a 4 GB window covering
      the core kernel (based on the -/+ 4 GB range of an ADRP/ADD pair),
      we may end up putting the core kernel out of the -/+ 2 GB range of
      32-bit relative references of module ksymtab entries that refer to
      per-CPU variables.
      
      So reduce the module randomization range a bit further. We lose
      1 bit of randomization this way, but this is something we can
      tolerate.
      
      Cc: <stable@vger.kernel.org> # v4.19+
      Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@arm.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      b2eed9b5
    • Will Deacon's avatar
      arm64: errata: Add workaround for Cortex-A76 erratum #1463225 · 969f5ea6
      Will Deacon authored
      
      Revisions of the Cortex-A76 CPU prior to r4p0 are affected by an erratum
      that can prevent interrupts from being taken when single-stepping.
      
      This patch implements a software workaround to prevent userspace from
      effectively being able to disable interrupts.
      
      Cc: <stable@vger.kernel.org>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      969f5ea6
    • Will Deacon's avatar
      arm64: Remove useless message during oops · 3e29ead5
      Will Deacon authored
      
      During an oops, we print the name of the current task and its pid twice.
      We also helpfully advertise its stack limit as "0x(____ptrval____)".
      
      Drop these useless messages.
      
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      3e29ead5
  2. May 18, 2019
  3. May 17, 2019
  4. May 16, 2019
  5. May 15, 2019
    • Russell King's avatar
      Revert "ARM: 8846/1: warn if divided syntax assembler is used" · b752bb40
      Russell King authored
      
      This reverts commit e8c24bbd.
      
      GCC 4.7, which is still permitted, emits code using the original
      syntax.  This means we end up with lots of assembler warnings when
      building with a currently-supported version of gcc.
      
      Revert the commit (with fixups to keep the follow-on -mauto-it
      change) to avoid these warnings.
      
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      b752bb40
    • Manuel Lauss's avatar
      MIPS: Alchemy: add DMA masks for on-chip ethernet · b1e479e3
      Manuel Lauss authored
      
      Makes au1000-eth work again, tested on DB1500.
      
      Signed-off-by: default avatarManuel Lauss <manuel.lauss@gmail.com>
      Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
      Cc: Linux-MIPS <linux-mips@linux-mips.org>
      Unverified
      b1e479e3
    • Sean Christopherson's avatar
      Revert "KVM: nVMX: Expose RDPMC-exiting only when guest supports PMU" · f93f7ede
      Sean Christopherson authored
      
      The RDPMC-exiting control is dependent on the existence of the RDPMC
      instruction itself, i.e. is not tied to the "Architectural Performance
      Monitoring" feature.  For all intents and purposes, the control exists
      on all CPUs with VMX support since RDPMC also exists on all VCPUs with
      VMX supported.  Per Intel's SDM:
      
        The RDPMC instruction was introduced into the IA-32 Architecture in
        the Pentium Pro processor and the Pentium processor with MMX technology.
        The earlier Pentium processors have performance-monitoring counters, but
        they must be read with the RDMSR instruction.
      
      Because RDPMC-exiting always exists, KVM requires the control and refuses
      to load if it's not available.  As a result, hiding the PMU from a guest
      breaks nested virtualization if the guest attemts to use KVM.
      
      While it's not explicitly stated in the RDPMC pseudocode, the VM-Exit
      check for RDPMC-exiting follows standard fault vs. VM-Exit prioritization
      for privileged instructions, e.g. occurs after the CPL/CR0.PE/CR4.PCE
      checks, but before the counter referenced in ECX is checked for validity.
      
      In other words, the original KVM behavior of injecting a #GP was correct,
      and the KVM unit test needs to be adjusted accordingly, e.g. eat the #GP
      when the unit test guest (L3 in this case) executes RDPMC without
      RDPMC-exiting set in the unit test host (L2).
      
      This reverts commit e51bfdb6.
      
      Fixes: e51bfdb6 ("KVM: nVMX: Expose RDPMC-exiting only when guest supports PMU")
      Reported-by: default avatarDavid Hill <hilld@binarystorm.net>
      Cc: Saar Amar <saaramar@microsoft.com>
      Cc: Mihai Carabas <mihai.carabas@oracle.com>
      Cc: Jim Mattson <jmattson@google.com>
      Cc: Liran Alon <liran.alon@oracle.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      f93f7ede
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