- Feb 11, 2009
-
-
Milton Miller authored
find_min_common_depth() was checking the property length incorrectly. The value is in bytes not cells, and it is using the second entry. Signed-off-By:
Milton Miller <miltonm@bga.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
-
- Feb 10, 2009
-
-
Michael Neuling authored
arch/powerpc/platforms/pseries/hotplug-memory.c uses remove_section_mapping() but doesn't include sparsemem.h which defines it. This can cause compilation fails for some configs. Signed-off-by:
Michael Neuling <mikey@neuling.org> Signed-off-by:
-
Benjamin Herrenschmidt authored
The new legacy_mem file in sysfs is causing problems with X on machines that don't support legacy memory access. The way I initially implemented it, we would fail with -ENXIO when trying to mmap it, thus exposing to X that we do support the API but there is no legacy memory. Unfortunately, X poor error handling is causing it to fail to start when it gets this error. This implements a workaround hack that instead maps anonymous memory instead (using shmem if VM_SHARED is set, just like /dev/zero does). Signed-off-by: -
Michael Neuling authored
arch/powerpc/oprofile/cell/spu_profiler.c is missing a asm/time.h include which is required for ppc_proc_freq. This can cause compile failures for some config combinations. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
-
Steven Rostedt authored
Impact: fix dynamic ftrace with large modules in PPC64 The math to calculate the offset into the TOC that is taken from reading the trampoline is incorrect. The bottom half of the offset is a signed extended short. The current code was using an OR to create the offset when it should have been using an addition. Signed-off-by:
Steven Rostedt <srostedt@redhat.com> Acked-by:
Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by:
-
Ananth N Mavinakayanahalli authored
Currently emulate_step() emulates mr. instructions without updating cr0 and this can be disastrous. Don't emulate mr. This bug has been around for a while, but I am not sure if its a worthy -stable candidate. I'll leave it to Ben do decide. Signed-off-by:
Ananth N Mavinakayanahalli <ananth@in.ibm.com> Signed-off-by:
-
Kumar Gala authored
Fixed v_mapped_by_tlbcam() and p_mapped_by_tlbcam() to use phys_addr_t instead of unsigned long. In 36-bit physical mode we really need these functions to deal with phys_addr_t when trying to match a physical address or when returning one. Signed-off-by:Kumar Gala <galak@kernel.crashing.org>
-
- Feb 06, 2009
-
-
Anton Vorontsov authored
Simply add appropriate sdhci nodes. Note that U-Boot should configure pin multiplexing for eSDHC prior to Linux could use it. U-Boot should also fill-in the clock-frequency property (eSDHC clock depends on board-specific SCCR[ESDHCCM] bits). Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
-
Anton Vorontsov authored
- sdhc node renamed to sdhci ("sdhc" name is confusing since SDHC is used to name Secure Digital High Capacity cards, while SDHCI is an interface). - Get rid of "fsl,esdhc" compatible entry, it's replaced by the "fsl,<chip>-esdhc" scheme; - Get rid of `model' property. Signed-off-by: -
Julia Lawall authored
Taking sizeof the result of sizeof is quite strange and does not seem to be what is wanted here. This was fixed using the following semantic patch. (http://www.emn.fr/x-info/coccinelle/ ) // <smpl> @@ expression E; @@ - sizeof ( sizeof (E) - ) @@ type T; @@ - sizeof ( sizeof (T) - ) // </smpl> Signed-off-by:
Julia Lawall <julia@diku.dk> Acked-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
-
paulfax authored
This is a simple change to correct problems when using set_irq_type on platforms using CPM2. This code corrects the problem on most platform but may have issues on 8272 derived platforms for some interrupts. On 8272 PC2 & 3 are missing and PC 23 & 29 are added, which this patch does not address. Signed-off-by:
Paul Bilke <paul@conspiracy.net> Reviewed-by:
-
Anton Vorontsov authored
TSEC0 is connected to Vitesse 7385 5-port switch. The switch isn't connected to any mdio bus, the link to the switch is fixed to Full-duplex 1000 Mb/s (no pause). This patch fixes following failure during bootup: mdio@24520:01 not found eth0: Could not attach to PHY IP-Config: Failed to open eth0 Signed-off-by:
-
Anton Vorontsov authored
commit b31a1d8b ("gianfar: Convert gianfar to an of_platform_driver") introduced a child node for the ethernet@25000 controller, but no address and size cells specifiers were added, and that makes dtc unhappy: DTC: dts->dtb on file "arch/powerpc/boot/dts/mpc8313erdb.dts" Warning (reg_format): "reg" property in /soc8313@e0000000/ethernet@25000/mdio@25520 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc8313@e0000000/ethernet@25000/mdio@25520 Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc8313@e0000000/ethernet@25000/mdio@25520 Signed-off-by:
-
Michael Neuling authored
I noticed this doing some randconfig testing (.config below). I have CONFIG_PM but no CONFIG_SUSPEND. Bug is against mainline. arch/powerpc/sysdev/built-in.o: In function `ipic_suspend': ipic.c:(.text+0x6b34): undefined reference to `fsl_deep_sleep' make[1]: *** [.tmp_vmlinux1] Error 1 make: *** [sub-make] Error 2 Looks like #ifdef CONFIG_PM in arch/powerpc/sysdev/ipic.c should be CONFIG_SUSPEND. d49747bd introduced this. Fix build when we have CONFIG_PM but no CONFIG_SUSPEND. Signed-off-by:
-
- Feb 04, 2009
-
-
Grzegorz Bernacki authored
Board support for the InterControl Digsy-MTC device based on the MPC5200B SoC. Signed-off-by:
Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
-
Grant Likely authored
This patch adds board support for the Media5200 platform. Changes are: - add the media5200 device tree - add the media5200 platform support code and cascaded interrupt controller - add media5200 to the build targets. Note: this patch also includes a minor tweak to the lite5200(b) target images list to add the .dtb files to the image list. Signed-off-by: -
Grant Likely authored
This patch adds IRQ controller support to the MPC5200 General Purpose Timer (GPT) device driver. With this patch the mpc5200-gpt driver supports both GPIO and IRQ functions. The GPT driver was contained within the mpc52xx_gpio.c file, but this patch moves it out into a new file (mpc52xx_gpt.c) since it has more than just GPIO functionality now and it was only grouped with the mpc52xx-gpio drivers as a matter of convenience before. Also, this driver will most likely get extended again to also provide support for the timer function. Implementation note: Alternately, I could have tried to implement the IRQ support as a separate driver and left the GPIO portion alone. However, multiple functions of this device (ie. GPIO input+interrupt controller, or timer+GPIO) can be active at the same time and the registers are shared so it is safer to contain all functionality within a single driver. Signed-off-by:
Wolfram Sang <w.sang@pengutronix.de>
-
Grant Likely authored
Rework the mpc5200-pic driver to simplify it and fix up the setting of desc->status when set_type is called for internal IRQs (so they are reported as level, not edge). The simplification is due to splitting off the handling of external IRQs into a separate block so they don't need to be handled as exceptions in the normal CRIT, MAIN and PERP paths. Signed-off-by: -
Grant Likely authored
pr_debug() calls in the 'hot' *_mask(), *_unmask(), *_ack() and get_irq() makes adding #define DEBUG pretty much useless. Remove these calls because they completely swamp the output. Signed-off-by:
-
- Feb 03, 2009
-
-
Grant Likely authored
Trim out obsolete/extraneous properties and tighten up some usage conventions. Changes include: - removal of device_type properties - removal of cell-index properties - Addition of gpio-controller and #gpio-cells properties to gpio nodes - Move common interrupt-parent property out of device nodes and into top level parent node. This patch also include what looks to be just trivial editorial whitespace/format changes, but there is real method in this madness. Editorial changes were made to keep the all the mpc5200 board device trees as similar as possible so that diffs between them only show the real differences between the boards. The pcm030 device tree was most affected by this because many of the comments had been changed from // to /* */ style and some cell values where changed from decimal to hex format when it was cloned from one of the other 5200 device trees. Signed-off-by:
-
- Feb 02, 2009
-
-
Reynes Philippe authored
Signed-off-by:
Philippe Reynes <philippe.reynes@isismpp.fr> Signed-off-by:
-
Wolfgang Grandegger authored
Automatic I2C device probing is not done any more. Therefore we need proper DTS device node definitions for the I2C LM75 thermal sensor on the TQM85xx modules. Signed-off-by:
Wolfgang Grandegger <wg@grandegger.com> Signed-off-by:
-
Wolfgang Grandegger authored
Signed-off-by:
-
Reynes Philippe authored
Signed-off-by:
-
Benjamin Herrenschmidt authored
Recently, a patch left DEBUG enabled in the powerpc common PCI code, resulting in an old bug in a pr_debug() statement to show up and cause a NULL dereference on some machines. This fixes the pr_debug() statement and reverts to DEBUG not being force-enabled in that file. Signed-off-by:
-
- Jan 30, 2009
-
-
Grant Likely authored
This patch ensures that memory gets properly mapped into the PCI address space. Without this patch, the memory window BAR is left at whatever value happened to be loaded into the BAR when Linux was booted. Without this patch, memory could end up getting mapped at any of the 1G address boundaries instead of at '0' where Linux expects it. Similarly, this patch also ensures that the internally memory mapped registers (IMMR) are mapped to the correct PCI address range. Without this patch, PCI appears to work correctly until a PCI device is inserted which DMAs into memory. Signed-off-by:
-
Grant Likely authored
Signed-off-by:
-
- Jan 29, 2009
-
-
Martyn Welch authored
This patch adds basic support for the 6 GPIO lines found on GE Fanucs SBC310 to the GE Fanuc GPIO driver. Signed-off-by:
Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by:
-
Martyn Welch authored
Support for the SBC310 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D). This is the default config file for GE Fanuc's SBC310, a 3U single board computer, based on Freescale's MPC8641D. Signed-off-by:
-
Martyn Welch authored
Support for the SBC310 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D). This is the basic board support for GE Fanuc's SBC310, a 3U single board computer, based on Freescale's MPC8641D. Signed-off-by:
-
Kumar Gala authored
The FSL PCI code depends on PCI quirks being enabled to function properly. We can ensure this by doing a select in Kconfig of PCI_QUIRKS. Signed-off-by: -
Reynes Philippe authored
Signed-off-by:
-
Laurent Pinchart authored
Instead of rounding the divider down, improve the baud-rate generators accuracy by rounding to the nearest integer. Signed-off-by:
Laurent Pinchart <laurentp@cse-semaphore.com> Signed-off-by:
-
Trent Piepho authored
On booke processors, the code that maps low memory only uses up to three CAM entries, even though there are sixteen and nothing else uses them. Make this number configurable in the advanced options menu along with max low memory size. If one wants 1 GB of lowmem, then it's typically necessary to have four CAM entries. Signed-off-by:
Trent Piepho <tpiepho@freescale.com> Signed-off-by:
-
Trent Piepho authored
The code that maps kernel low memory would only use page sizes up to 256 MB. On E500v2 pages up to 4 GB are supported. However, a page must be aligned to a multiple of the page's size. I.e. 256 MB pages must aligned to a 256 MB boundary. This was enforced by a requirement that the physical and virtual addresses of the start of lowmem be aligned to 256 MB. Clearly requiring 1GB or 4GB alignment to allow pages of that size isn't acceptable. To solve this, I simply have adjust_total_lowmem() take alignment into account when it decides what size pages to use. Give it PAGE_OFFSET = 0x7000_0000, PHYSICAL_START = 0x3000_0000, and 2GB of RAM, and it will map pages like this: PA 0x3000_0000 VA 0x7000_0000 Size 256 MB PA 0x4000_0000 VA 0x8000_0000 Size 1 GB PA 0x8000_0000 VA 0xC000_0000 Size 256 MB PA 0x9000_0000 VA 0xD000_0000 Size 256 MB PA 0xA000_0000 VA 0xE000_0000 Size 256 MB Because the lowmem mapping code now takes alignment into account, PHYSICAL_ALIGN can be lowered from 256 MB to 64 MB. Even lower might be possible. The lowmem code will work down to 4 kB but it's possible some of the boot code will fail before then. Poor alignment will force small pages to be used, which combined with the limited number of TLB1 pages available, will result in very little memory getting mapped. So alignments less than 64 MB probably aren't very useful anyway. Signed-off-by:
-
Trent Piepho authored
The code to map lowmem uses three CAM aka TLB[1] entries to cover it. The size of each is stored in three globals named __cam0, __cam1, and __cam2. All the code that uses them is duplicated three times for each of the three variables. We have these things called arrays and loops.... Once converted to use an array, it will be easier to make the number of CAMs configurable. Signed-off-by:
-
Kumar Gala authored
We currently have a few variants of fsl-booke processors (e500v1, e500v2, e500mc, and e200). They all have minor differences that we had previously been handling via ifdefs. To move towards having this support the following changes have been made: * PID1, PID2 only exist on e500v1 & e500v2 and should not be accessed on e500mc or e200. We use MMUCFG[NPIDS] to determine which case we are since we only touch PID1/2 in extremely early init code. * Not all IVORs exist on all the processors so introduce cpu_setup functions for each variant to setup the proper IVORs that are either unique or exist but have some variations between the processors Signed-off-by: -
Anton Vorontsov authored
This patch adds pcie nodes to the appropriate dts files, plus adds some probing code for the boards. Also, remove of_device_is_avaliable() check from the mpc837x_mds.c board file, as mpc83xx_add_bridge() has the same check now. Signed-off-by:
-
Anton Vorontsov authored
This patch adds support for PCI-Express controllers as found on the newer MPC83xx chips. The work is loosely based on the Tony Li's patch[1], but unlike the original patch, this patch implements sliding window for the Type 1 transactions using outbound window translations, so we don't have to ioremap the whole PCI-E configuration space. [1] http://ozlabs.org/pipermail/linuxppc-dev/2008-January/049028.html Signed-off-by:
Tony Li <tony.li@freescale.com> Signed-off-by:
-
- Jan 28, 2009
-
-
Gerhard Pircher authored
_PAGE_COHERENT is now always set in _PAGE_RAM resp. PAGE_KERNEL. Thus it has to be masked out, if the BAT mapping should be non cacheable or CPU_FTR_NEED_COHERENT is not set. This will work on normal SMP setups because we force-set CPU_FTR_NEED_COHERENT as part of CPU_FTR_COMMON on SMP. Signed-off-by:
Gerhard Pircher <gerhard_pircher@gmx.net> Signed-off-by:
-
