Commits · 24653515e5d2cb07772919599ad799ce50f8af4f · jan.koester / Linux · GitLab

May 13, 2016
- MIPS: Add and use CAUSEF_WP definition · e233c733
  James Hogan authored Mar 01, 2016
  e233c733
- MIPS: Add P6600 cases to CPU switch statements · 1091bfa2
  Paul Burton authored Feb 03, 2016
  1091bfa2
- MIPS: traps: Make sure secondary cores have a sane ebase register · 04d83f94
  Markos Chandras authored Feb 03, 2016
  04d83f94
- MIPS: panic immediately when panic_on_oops · 99a7a234
  Aaro Koskinen authored Mar 09, 2016
  99a7a234
May 09, 2016
- MIPS: Avoid using unwind_stack() with usermode · 81a76d71
  James Hogan authored Dec 04, 2015
  81a76d71
Apr 04, 2016
- MIPS: traps.c: Verify the ISA for microMIPS RDHWR emulation · 3d50a7fb
  Maciej W. Rozycki authored Jan 30, 2016
  3d50a7fb
Apr 03, 2016
- MIPS: traps: Correct the SIGTRAP debug ABI in `do_watch' and `do_trap_or_bp' · 3b143cca
  Maciej W. Rozycki authored Mar 04, 2016
  3b143cca
- MIPS: Fix misspellings in comments. · 92a76f6d
  Adam Buchbinder authored Feb 25, 2016
  92a76f6d
Mar 04, 2016
- MIPS: traps: Fix SIGFPE information leak from `do_ov' and `do_trap_or_bp' · e723e3f7
  Maciej W. Rozycki authored Mar 04, 2016
  e723e3f7
Feb 02, 2016
- MIPS: traps.c: Correct microMIPS RDHWR emulation · 7aa70471
  Maciej W. Rozycki authored Jan 30, 2016
  7aa70471
- MIPS: traps.c: Don't emulate RDHWR in the CpU #0 exception handler · 10f6d99f
  Maciej W. Rozycki authored Jan 30, 2016
  10f6d99f
Jan 24, 2016
- MIPS: Use EXCCODE_ constants with set_except_vector() · 1b505def
  James Hogan authored Dec 16, 2015
  1b505def
Nov 09, 2015
- MIPS: add nmi_enter() + nmi_exit() to nmi_exception_handler() · 7963b3f1
  Petri Gynther authored Oct 19, 2015
  7963b3f1
Oct 26, 2015
- MIPS: traps: tidy up ebase calculation · a13c9962
  Paul Burton authored Sep 22, 2015
  a13c9962
Sep 03, 2015
- MIPS: Add uprobes support. · 40e084a5
  Ralf Baechle authored Jul 29, 2015
  40e084a5
- MIPS: Set trap_no field in thread_struct on exception. · e3b28831
  Ralf Baechle authored Jul 28, 2015
  e3b28831
- MIPS: Refactor dumping of TLB registers for r3k/r4k · 3c865dd9
  James Hogan authored Jul 15, 2015
  3c865dd9
Aug 26, 2015
- MIPS: Add cases for CPU_I6400 · 4e88a862
  Markos Chandras authored Jul 09, 2015
  4e88a862
Aug 03, 2015
- MIPS: show_stack: Fix stack trace with EVA · 1e77863a
  James Hogan authored Jul 27, 2015
  1e77863a
- MIPS: do_mcheck: Fix kernel code dump with EVA · 55c723e1
  James Hogan authored Jul 27, 2015
  55c723e1
Jul 09, 2015
- MIPS: kernel: traps: Fix broken indentation · 761b4493
  Markos Chandras authored Jun 24, 2015
  761b4493
Jun 21, 2015
- MIPS: Get rid of 'kgdb_early_setup' cruft. · 52ea7bff
  Sergei Shtylyov authored Jun 01, 2015
  52ea7bff
- MIPS: traps: print Exception Code in __show_regs() · 37dd3818
  Petri Gynther authored May 08, 2015
  37dd3818
May 12, 2015
- MIPS: traps: remove extra Tainted: line from __show_regs() output · 2d2ec2f7
  Petri Gynther authored May 08, 2015
  2d2ec2f7
Apr 07, 2015
- MIPS: Set `si_code' for SIGFPE signals sent from emulation too · 304acb71
  Maciej W. Rozycki authored Apr 03, 2015
  304acb71
- MIPS: Always clear FCSR cause bits after emulation · 443c4403
  Maciej W. Rozycki authored Apr 03, 2015
  443c4403
- MIPS: Respect the FCSR exception mask for `si_code' · ed2d72c1
  Maciej W. Rozycki authored Apr 03, 2015
  ed2d72c1
- MIPS: Correct FP ISA requirements · 2d83fea7
  Maciej W. Rozycki authored Apr 03, 2015
  2d83fea7
- MIPS: Fix BREAK code interpretation heuristics · c9875032
  Maciej W. Rozycki authored Apr 03, 2015
  c9875032
- MIPS: BREAK instruction interpretation corrections · f6a31da5
  Maciej W. Rozycki authored Apr 03, 2015
  f6a31da5
- MIPS: Correct MIPS16 BREAK code interpretation · 68893e00
  Maciej W. Rozycki authored Apr 03, 2015
  68893e00
- MIPS: Normalise code flow in the CpU exception handler · 27e28e8e
  Maciej W. Rozycki authored Apr 03, 2015
  27e28e8e
- MIPS: Reindent R6 RI exception emulation · 4a7c2371
  Maciej W. Rozycki authored Apr 03, 2015
  4a7c2371
- MIPS: Correct the comment for FPU emulator traps · 1f443779
  Maciej W. Rozycki authored Apr 03, 2015
  1f443779
Mar 31, 2015
- MIPS: Read CPU IRQ line that FDC to routed to · 8f7ff027
  James Hogan authored Jan 29, 2015
  8f7ff027
- MIPS: Allow shared IRQ for timer & perf counter · 4a91d8fb
  James Hogan authored Jan 27, 2015
  4a91d8fb
Mar 27, 2015
- MIPS: Clear [MSA]FPE CSR.Cause after notify_die() · 64bedffe
  James Hogan authored Dec 02, 2014
  64bedffe
- MIPS: Ensure FCSR cause bits are clear after invoking FPU emulator · ad70c13a
  Paul Burton authored Jan 30, 2015
  ad70c13a
Mar 05, 2015
- mips: fix up obsolete cpu function usage. · 8dd92891
  Rusty Russell authored Mar 05, 2015
  8dd92891
Feb 17, 2015
- MIPS: Make use of the ERETNC instruction on MIPS R6 · 7c151d3d
  Markos Chandras authored Dec 03, 2014
  7c151d3d