- Mar 10, 2011
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Santosh Shilimkar authored
Remove the custom restore_control_register() and use the exported set_cr() instead to set the system control register(SCTRL) value. No functional change. Signed-off-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
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Paul Walmsley authored
The OMAP2 and OMAP3 PM code clears clockdomain wakeup and sleep dependencies. This is unnecessary after commit 6f7f63cc ("OMAP clockdomain: initialize clockdomain registers when the clockdomain layer starts") which clears these dependencies during clockdomain init. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
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Kevin Hilman authored
Now that omap_hwmod + omap_device is used for OMAP UART device and driver code, we no longer need the UART physical addresses in omap_globals. Note that the #defines for the base addresses are still left in <plat/serial.h> since they are used by DEBUG_LL and uncompress code. Build tested for OMAP1 (omap1_defconfig) and OMAP2+ (omap2plus_defconfig) Signed-off-by:
Kevin Hilman <khilman@ti.com>
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Vasiliy Kulikov authored
kzalloc() may fail, if so return -ENOMEM. Also Walter Harms suggested to use kasprintf() instead of kzalloc+strcpy+strcat. Signed-off-by:
Vasiliy Kulikov <segoon@openwall.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
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Nishanth Menon authored
OMP3630 silicon can enable higher frequencies only depending on the board characteristics meeting the recommended standards, and has to be selectively toggled. Beagle XM uses 3730 variant and the board design allows enabling 800MHz and 1GHz OPPs. However, We need Smart reflex class 1.5 and ABB to enable 1GHz safely. For the moment, we tweak the default table to allow for 800Mhz OPP usage. Reported-by:
Koen Kooi <koen@beagleboard.org> Tested-by:
Koen Kooi <koen@beagleboard.org> Signed-off-by:
Nishanth Menon <nm@ti.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
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Menon, Nishanth authored
omap3 and omap4 opp_init should be made non-static to allow for platform specific opp table tweaking. making these static conflicts with the definition in pm.h(global) as well. we include pm.h as well to ensure that there are no such prototype conflicts with actual implementation in the future. Signed-off-by:
Nishanth Menon <nm@ti.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
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Ricardo Salveti de Araujo authored
In case in user has a OMAP3630 < ES1.2 the kernel should warn the user about the ERRATUM, but using pr_warn instead of WARN_ON is already enough, as there is nothing else the user can do besides changing the board. Signed-off-by:
Ricardo Salveti de Araujo <ricardo.salveti@canonical.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
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- Mar 04, 2011
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Mark Brown authored
The debugfs support added to the regulator API (which has been merged in during this merge window) creates directories for regulators named after the display names for the regulators so replace / as a separator for multiple supplies with + in the SMDK6410 machine. Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Mark Brown authored
Avoid relying on implicit inclusion of machine.h Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Ben Dooks authored
Reduce the logging output of s3c64xx_dma_init1() as it is not useful for normal bootup (and we get an overall indication of the registration of the PL180 DMA block). This removes the following output from the log: s3c64xx_dma_init1: registering DMA 0 (e0808100) s3c64xx_dma_init1: registering DMA 1 (e0808120) s3c64xx_dma_init1: registering DMA 2 (e0808140) s3c64xx_dma_init1: registering DMA 3 (e0808160) s3c64xx_dma_init1: registering DMA 4 (e0808180) s3c64xx_dma_init1: registering DMA 5 (e08081a0) s3c64xx_dma_init1: registering DMA 6 (e08081c0) s3c64xx_dma_init1: registering DMA 7 (e08081e0) Signed-off-by:
Ben Dooks <ben-linux@fluff.org> Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Mark Brown authored
The MMC core calls s3c6400_setup_sdhcp_cfg_card() very frequently, causing the log message in there at KERN_INFO to be displayed a lot which is slow and overly chatty. Convert the message into a pr_debug() to tone this down. Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Ben Dooks authored
The clock for i2c1 has been missing for a while, add it to the list of clocks for the system and ensure it is initialised at startup. Signed-off-by:
Ben Dooks <ben-linux@fluff.org> Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Mark Brown authored
No need to put these in the global namespace and sparse gets upset. Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Mark Brown authored
Ensures that the declaration agrees with the definition and makes sparse happy. Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Ben Dooks authored
The call to s3c_gpio_cfgrange_nopull() takes a size and base but this looks like it is trying to do base and end. This means it is configuring too many GPIOs and on the case of the Cragganmore means we're seeing an overflow of the ROW pins causing problems with the keyboard driver. Signed-off-by:
Ben Dooks <ben-linux@fluff.org> Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Lars-Peter Clausen authored
The gta02 header file still uses the old S3C2410_GPJx defines instead of the S3C2410_GPJ(x) macro. Since the S3C2410_GPJx defines have already been removed this causes the following build failure: sound/soc/samsung/neo1973_wm8753.c: In function 'lm4853_set_spk': sound/soc/samsung/neo1973_wm8753.c:259: error: 'S3C2440_GPJ2' undeclared (first use in this function) sound/soc/samsung/neo1973_wm8753.c:259: error: (Each undeclared identifier is reported only once sound/soc/samsung/neo1973_wm8753.c:259: error: for each function it appears in.) sound/soc/samsung/neo1973_wm8753.c: In function 'lm4853_get_spk': sound/soc/samsung/neo1973_wm8753.c:267: error: 'S3C2440_GPJ2' undeclared (first use in this function) sound/soc/samsung/neo1973_wm8753.c: In function 'lm4853_event': sound/soc/samsung/neo1973_wm8753.c:276: error: 'S3C2440_GPJ1' undeclared (first use in this function) sound/soc/samsung/neo1973_wm8753.c: At top level: sound/soc/samsung/neo1973_wm8753.c:439: error: 'S3C2440_GPJ2' undeclared here (not in a function) sound/soc/samsung/neo1973_wm8753.c:440: error: 'S3C2440_GPJ1' undeclared here (not in a function) This patches fixes the issue by doing a s,S3C2410_GPJ([\d]+),S3C2410_GPJ(\1),g on the file. Signed-off-by:
Lars-Peter Clausen <lars@metafoo.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Banajit Goswami authored
This patch modifies the number of total GPIO lines for Bank F for Samsung S5P6440 and S5P6450 SoCs from 2 to 16. This is necessary as the GPIO lines from 0 to 13 are reserved and only lines 14 and 15 are used. As during initialization, the line number starts at 0, putting 2 does not solve the intended purpose. Signed-off-by:
Banajit Goswami <banajit.g@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Lars-Peter Clausen authored
The gta02 mach file references the ohci device. So we need to select S3C_DEV_USB_HOST to have the device available. This fixes the following linker errors: arch/arm/mach-s3c2440/built-in.o: In function 'gta02_machine_init': mach-gta02.c:(.init.text+0x370): undefined reference to 's3c_ohci_set_platdata' arch/arm/mach-s3c2440/built-in.o:(.init.data+0xac): undefined reference to 's3c_device_ohci' Signed-off-by:
Lars-Peter Clausen <lars@metafoo.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Kuninori Morimoto authored
mackerel WVGA LCDC panel expect 33.3MHz for dot-clock, but current dot-clock was 50.0MHz. This patch modify clock divider value. Signed-off-by:
Makoto Ueda <makoto.ueda.ub@renesas.com> Signed-off-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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Kuninori Morimoto authored
ap4evb WVGA LCDC panel expect 33.3MHz for dot-clock, but current dot-clock was 50.0MHz. This patch modify clock divider value. Signed-off-by:
Makoto Ueda <makoto.ueda.ub@renesas.com> Signed-off-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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- Mar 03, 2011
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Hari Kanigeri authored
omap4 interrupt disable bits is different. On rx kfifo full, the mbox rx interrupts wasn't getting disabled, and this is causing the rcm stress tests to hang. Signed-off-by:
Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by:
Armando Uribe <x0095078@ti.com> Signed-off-by:
Fernando Guzman Lugo <fernando.lugo@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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- Mar 02, 2011
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Shweta Gulati authored
This Patch frees all the dynamically allocated memory which couldn't have been released in some error hitting cases. Signed-off-by:
Shweta Gulati <shweta.gulati@ti.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
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Aaro Koskinen authored
Temporary strings with volt_* file names should be released after the debugfs entries are created. While at it, also simplify the string allocation, and use just snprintf() to create the name. The patch eliminates kmemleak reports with the following stack trace (multiple objects depending on HW): unreferenced object 0xcedbc5a0 (size 64): comm "swapper", pid 1, jiffies 4294929375 (age 423.734s) hex dump (first 32 bytes): 76 6f 6c 74 5f 39 37 35 30 30 30 00 00 00 00 00 volt_975000..... 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ backtrace: [<c012fee0>] create_object+0x104/0x208 [<c012dbc8>] kmem_cache_alloc_trace+0xf0/0x17c [<c0013f64>] omap_sr_probe+0x314/0x420 [<c02a1724>] platform_drv_probe+0x18/0x1c [<c02a088c>] driver_probe_device+0xc8/0x188 [<c02a09b4>] __driver_attach+0x68/0x8c [<c02a00ac>] bus_for_each_dev+0x44/0x74 [<c029f9e0>] bus_add_driver+0xa0/0x228 [<c02a0cac>] driver_register+0xa8/0x130 [<c02a1b2c>] platform_driver_probe+0x18/0x8c [<c0013c1c>] sr_init+0x40/0x74 [<c005a554>] do_one_initcall+0xc8/0x1a0 [<c00084f4>] kernel_init+0x150/0x218 [<c0065d64>] kernel_thread_exit+0x0/0x8 [<ffffffff>] 0xffffffff Signed-off-by:
Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
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- Feb 28, 2011
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Axel Lin authored
Fix below section mismatch warning: WARNING: vmlinux.o(.data+0x673c): Section mismatch in reference from the variable davinci_driver to the function .init.text:davinci_cpu_init() The variable davinci_driver references the function __init davinci_cpu_init() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console, Signed-off-by:
Axel Lin <axel.lin@gmail.com> Acked-by:
Sekhar Nori <nsekhar@ti.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
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Sergei Shtylyov authored
Commit 6d803ba7 (ARM: 6483/1: arm & sh: factorised duplicated clkdev.c) caused the following warnings: In file included from /home/headless/src/kernel.org/linux-davinci/arch/arm/ include/asm/clkdev.h:17, from include/linux/clkdev.h:15, from arch/arm/mach-davinci/clock.h:71, from arch/arm/mach-davinci/common.c:22: arch/arm/mach-davinci/include/mach/clkdev.h:4: warning: `struct clk' declared inside parameter list arch/arm/mach-davinci/include/mach/clkdev.h:4: warning: its scope is only this definition or declaration, which is probably not what you want arch/arm/mach-davinci/include/mach/clkdev.h:9: warning: `struct clk' declared inside parameter list Signed-off-by:
Sergei Shtylyov <sshtylyov@ru.mvista.com> Acked-by:
Sekhar Nori <nsekhar@ti.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
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Hirosh Dabui authored
This patch fix a bug in the register indexing for GPIOs numbers > 31 to get the relevant hardware registers of tnetv107x to control the GPIOs. In the structure tnetv107x_gpio_regs: struct tnetv107x_gpio_regs { u32 idver; u32 data_in[3]; u32 data_out[3]; u32 direction[3]; u32 enable[3]; }; The GPIO hardware register addresses of tnetv107x are stored. The chip implements 3 registers of each entity to serve 96 GPIOs, each register provides a subset of 32 GPIOs. The driver provides these macros: gpio_reg_set_bit, gpio_reg_get_bit and gpio_reg_clear_bit. The bug implied the use of macros to access the relevant hardware register e.g. the driver code used the macro like this: 'gpio_reg_clear_bit(®->data_out, gpio)' But it has to be used like this: 'gpio_reg_clear_bit(reg->data_out, gpio)'. The different results are shown here: - ®->data_out + 1 (it will add the full array size of data_out i.e. 12 bytes) - reg->data_out + 1 (it will increment only the size of data_out i.e. only 4 bytes) Acked-by:
Cyril Chemparathy <cyril@ti.com> Signed-off-by:
Hirosh Dabui <hirosh.dabui@snom.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
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Rajashekhara, Sudhakar authored
After the multi-component commit f0fba2ad (ASoC: multi-component - ASoC Multi-Component Support) for ASoC, we need to register the platform device for davinci-pcm-audio. This patch and patch at [1] are required for audio to work on DA850/OMAP-L138. [1] https://patchwork.kernel.org/patch/495211/ Signed-off-by:
Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
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- Feb 27, 2011
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Dmitry Baryshkov authored
Since f0fba2ad it's required to register platform devices even for AC'97 codecs. Register one on tosa (wm9712-codec). Signed-off-by:
Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Cc: Eric Miao <eric.y.miao@gmail.com> Signed-off-by:
Eric Miao <eric.y.miao@gmail.com>
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Dmitry Baryshkov authored
pxa25x platforms were left out of major ASoC Update patch. Since f0fba2ad a registration of pxa-pcm-audio device is required for ASoC to function on pxa platforms. Register one also for pxa210/pxa25x. Signed-off-by:
Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Cc: Eric Miao <eric.y.miao@gmail.com> Signed-off-by:
Eric Miao <eric.y.miao@gmail.com>
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Dmitry Baryshkov authored
Since 2e48928d it's no longer possible to set the name of the LED trigger for RFKILL events. Drop respective code from tosa-bt.c Signed-off-by:
Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Cc: Stephen Hemminger <shemminger@vyatta.com> Cc: John W. Linville <linville@tuxdriver.com> Signed-off-by:
Eric Miao <eric.y.miao@gmail.com>
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- Feb 26, 2011
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Kukjin Kim authored
The S5P6442 and S5PC100 SoCs have 4 VICs. However, default VIC number is defined 2 in arch/arm/common. So can be happened some problem on it. Basically, it requires for suspend and resume. Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Kukjin Kim authored
The S5PV210 SoC have 4 VICs. It requires for suspend and resume. Signed-off-by:
Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Will Deacon authored
ARMv7 allows the debug core logic to be powered down and provides the DBGPRSR register so that software can power-up and check the status of the logic. This patch ensures that the debug logic is powered up on ARMv7 cores before we attempt to access the extended debug registers. Signed-off-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Will Deacon authored
The GETHBPREGS ptrace request incorrectly maps its index argument onto the thread's saved debug state when the index != 0. This has not yet been seen from userspace because GDB (the only user of this request) only reads from register 0. This patch fixes the indexing. Signed-off-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Nicolas Pitre authored
Since commit 6fc31d54 this comment is no longer true. Signed-off-by:
Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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- Feb 25, 2011
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Santosh Shilimkar authored
CPU0 and CPU1 clockdomain is at the offset of 0x18 from the LPRM base. The header file has set it wrongly to 0x0. Offset 0x0 is for CPUx power domain control register Fix the same. The autogen scripts is fixed thanks to Benoit Cousson With the old value, the clockdomain code would access the *_PWRSTCTRL.POWERSTATE field when it thought it was accessing the *_CLKSTCTRL.CLKTRCTRL field. In the worst case, this could cause system power management to behave incorrectly. Signed-off-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> [paul@pwsan.com: added second paragraph to commit message] Signed-off-by:
Paul Walmsley <paul@pwsan.com>
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- Feb 24, 2011
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Paul Walmsley authored
OMAP2+ kernels built without CONFIG_OMAP_32K_TIMER crash on boot after the 2.6.38 sched_clock changes: [ 0.000000] OMAP clockevent source: GPTIMER1 at 13000000 Hz [ 0.000000] Unable to handle kernel NULL pointer dereference at virtual address 00000000 [ 0.000000] pgd = c0004000 [ 0.000000] [00000000] *pgd=00000000 [ 0.000000] Internal error: Oops: 80000005 [#1] SMP [ 0.000000] last sysfs file: [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 Not tainted (2.6.38-rc5-00057-g04aa67d #152) [ 0.000000] PC is at 0x0 [ 0.000000] LR is at sched_clock_poll+0x2c/0x3c Without CONFIG_OMAP_32K_TIMER, the kernel has an clockevent and clocksource resolution about three orders of magnitude higher than with CONFIG_OMAP_32K_TIMER set. The tradeoff is that the lowest power consumption states are not available. Fix by calling init_sched_clock() from the GPTIMER clocksource init code. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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- Feb 23, 2011
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Uwe Kleine-König authored
Commit 06824ba8 (ARM: tlb: delay page freeing for SMP and ARMv7 CPUs) introduced a build failure for builds with CONFIG_SWAP=n: In file included from arch/arm/mm/init.c:27: arch/arm/include/asm/tlb.h: In function 'tlb_flush_mmu': arch/arm/include/asm/tlb.h:101: error: implicit declaration of function 'release_pages' arch/arm/include/asm/tlb.h: In function 'tlb_remove_page': arch/arm/include/asm/tlb.h:165: error: implicit declaration of function 'page_cache_release' as linux/swap.h doesn't include linux/pagemap.h but actually needs it (see comments in linux/swap.h as to why this is.) Fix that by #including <linux/pagemap.h> in <asm/pgalloc.h> as it's done by x86. Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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John Ogness authored
In OMAP35X TRM Rev 2010-05 Figure 7-18 "DPLL With EMI Reduction Feature", it is shown that the internal frequency is calculated by CLK_IN/(N+1). However, the value passed to _dpll_test_fint() is already "N+1" since Linux is using the values to divide by. In the technical reference manual, "N" is referring to the divider's register value (0-127). During power management testing, it was observed that programming the wrong jitter correction value can cause the system to become unstable and eventually crash. Signed-off-by:
John Ogness <john.ogness@linutronix.de> [paul@pwsan.com: added second paragraph to commit message] Signed-off-by:
Paul Walmsley <paul@pwsan.com>
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- Feb 21, 2011
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Nicolas Pitre authored
Marcin Slusarz says: > In arch/arm/kernel/kprobes-decode.c there's a function > arm_kprobe_decode_insn which does: > > } else if ((insn & 0x0e000000) == 0x0c400000) { > ... > > This is always false, so code below is dead. > I found this bug by coccinelle (http://coccinelle.lip6.fr/ ). Reported-by:
Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by:
Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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