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    • Phil Reid's avatar
      i2c: mux: pca954x: Add interrupt controller support · f2114795
      Phil Reid authored
      
      
      Various muxes can aggregate multiple interrupts from each i2c bus.
      All of the muxes with interrupt support combine the active low irq lines
      using an internal 'and' function and generate a combined active low
      output. The muxes do provide the ability to read a control register to
      determine which irq is active. By making the mux an irq controller isr
      latency can potentially be reduced by reading the status register and
      then only calling the registered isr on that bus segment.
      
      As there is no irq masking on the mux irq are disabled until irq_unmask is
      called at least once.
      
      Signed-off-by: default avatarPhil Reid <preid@electromag.com.au>
      Signed-off-by: default avatarPeter Rosin <peda@axentia.se>
      f2114795
    • Phil Reid's avatar
      i2c: mux: pca954x: Add missing pca9542 definition to chip_desc · f8251f1d
      Phil Reid authored
      
      
      The spec for the pca954x was missing. This chip is the same as the pca9540
      except that it has interrupt lines. While the i2c_device_id table mapped
      the pca9542 to the pca9540 definition the compatible table did not. In
      preparation for irq support add the pca9542 definition.
      
      Signed-off-by: default avatarPhil Reid <preid@electromag.com.au>
      Signed-off-by: default avatarPeter Rosin <peda@axentia.se>
      f8251f1d
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