- Jan 31, 2017
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Rafał Miłecki authored
So far were were allocating struct bgmac in 3 places: platform code, bcma code and shared bgmac_enet_probe function. The reason for this was bgmac_enet_probe: 1) Requiring early-filled struct bgmac 2) Calling alloc_etherdev on its own in order to use netdev_priv later This solution got few drawbacks: 1) Was duplicating allocating code 2) Required copying early-filled struct 3) Resulted in platform/bcma code having access only to unused struct Solve this situation by simply extracting some probe code into the new bgmac_alloc function. Signed-off-by:
Rafał Miłecki <rafal@milecki.pl> Reviewed-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Florian Fainelli authored
Commit 7318166c ("net: dsa: bcm_sf2: Add support for ethtool::rxnfc") added a new object to build: bcm_sf2_cfp.o, but in doing so, we essentially just built this object and no longer bcm_sf2.o. Fix this by creating a module named bcm-sf2.ko which links in bcm_sf2.o and bcm_sf2_cfp.o. Fixes: 7318166c ("net: dsa: bcm_sf2: Add support for ethtool::rxnfc") Signed-off-by:
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Ganesh Goudar authored
Change t4fw_version.h to update latest firmware version number 1.16.26.0. Signed-off-by:
Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by:
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Philippe Reynes authored
The ethtool api {get|set}_settings is deprecated. We move this driver to new api {get|set}_link_ksettings. As I don't have the hardware, I'd be very pleased if someone may test this patch. Signed-off-by:Philippe Reynes <tremyfr@gmail.com> Tested-by:
Pavel Belous <pavel.s.belous@gmail.com> Signed-off-by:
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Colin Ian King authored
encap_type should be checked to see if it is greater or equal to the size of array map to fix an off-by-one array size check. This fixes an array overrun read as detected by static analysis by CoverityScan, CID#1398883 ("Out-of-bounds-read") Fixes: 9b410801 ("sfc: insert catch-all filters for encapsulated traffic") Signed-off-by:Colin Ian King <colin.king@canonical.com> Acked-by:
Edward Cree <ecree@solarflare.com> Signed-off-by:
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Sergei Shtylyov authored
Now that we have almost all EESIPR bits declared (and those that are still not are most probably reserved anyway) we can at last replace the bare numbers used for 'sh_eth_cpu_data::eesipr_value' initializers with the bit names ORed together... Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
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Sergei Shtylyov authored
Renesas SH77{34|63} manuals describe more EESIPR bits than the current driver. Declare the new bits with the end goal of using the bit names instead of the bare numbers for the 'sh_eth_cpu_data::eesipr_value' initializers... Signed-off-by: -
Sergei Shtylyov authored
Since the commit b0ca2a21 ("sh_eth: Add support of SH7763 to sh_eth") the *enum* declaring the EESIPR bits (interrupt mask) went out of sync with the *enum* declaring the EESR bits (interrupt status) WRT bit naming and formatting. I'd like to restore the consistency by using EESIPR as the bit name prefix, renaming the *enum* to EESIPR_BIT, and (finally) renaming the bits according to the available Renesas SH77{34|63} manuals; additionally, reconstruct couple names using the EESR bit declaration above... Signed-off-by:
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- Jan 30, 2017
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Gregory CLEMENT authored
The Marvell 88E6341 device is single-chip, 6-port Ethernet switch with four integrated 10/100/1000Mbps Ethernet transceivers and one high speed SerDes interfaces. It belongs to the Topaz family and unlike the 88E6341 it does not have a TCAM. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by:
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Gregory CLEMENT authored
The Marvell 88E6341 device is single-chip, 6-port Ethernet switch with four integrated 10/100/1000Mbps Ethernet transceivers and one high speed SerDes interfaces. It is partially compatible with switches of family 88E6352 and switches of family 88E6390. This commit adds an initial support for this switch by describing its capabilities to the driver and introducing a new family. Signed-off-by:
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Romain Perier authored
Some Marvell ethernet switches have internal ethernet transceivers with hardcoded phy addresses. These addresses can be greater than the number of ports or its value might be different than the associated port number. This is for example the case for MV88E6341 that has 6 ports and internal Port 1 to Port4 PHYs mapped at SMI addresses from 0x11 to 0x14. This commits fixes the issue by removing the condition in MDIO callbacks. Signed-off-by:
Romain Perier <romain.perier@free-electrons.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Reviewed-by:
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Florian Fainelli authored
We can use b53_mirror_add and b53_mirror_del because the Starfighter 2 is register compatible in that specific case. Signed-off-by:
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Florian Fainelli authored
Add support for configuring port mirroring through the cls_matchall classifier. We do a full ingress or egress capture towards the capture port. Future improvements could include leveraging the divider to allow less frames to be captured, as well as matching specific MAC DA/SA. Signed-off-by:
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Florian Fainelli authored
Add definitions for the different Roboswitch registers relevant for ingress and egress mirroring. Signed-off-by:
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Shaker Daibes authored
Make sure pptx/pprx mask flag is set using new fields upon set port request. In addition, move this code into a helper function for better code readability. Signed-off-by:
Shaker Daibes <shakerd@mellanox.com> Signed-off-by:
Tariq Toukan <tariqt@mellanox.com> Signed-off-by:
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Shaker Daibes authored
Make sure MTU mask flag is set using new field upon set port request. In addition, move this code into a helper function for better code readability. Signed-off-by:
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Shaker Daibes authored
When starting the port, driver will inform Firmware about the actual MTU which does not include implicit headers, such as FCS or VLAN tags. Signed-off-by:
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Ariel Levkovich authored
This feature will allow the user to disable auto negotiation on the port for mlx4 devices while setting the speed is limited to 1GbE speeds. Other speeds will not be accepted in autoneg off mode. This functionality is permitted providing that the firmware is compatible with this feature. The above is determined by querying a new dedicated capability bit in the device. Signed-off-by:
Ariel Levkovich <lariel@mellanox.com> Signed-off-by:
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Alaa Hleihel authored
Avoid reading num_tc directly from struct net_device, but use the helper function netdev_get_num_tc. Fixes: bc6a4744 ("net/mlx4_en: num cores tx rings for every UP") Fixes: f5b6345b ("net/mlx4_en: User prio mapping gets corrupted when changing number of channels") Signed-off-by:
Alaa Hleihel <alaa@mellanox.com> Signed-off-by:
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Matan Barak authored
In order to aid debugging of functions that take a resource but don't put it, add the last function name that successfully grabbed this resource. Signed-off-by:
Matan Barak <matanb@mellanox.com> Signed-off-by:
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Yishai Hadas authored
The device revision field returned by the NodeInfo MAD is incorrect on ConnectX3 devices. This patch is driver side handling to complete a FW fix added at 2.11.1172. INIT_HCA - bit at offset 0x0C.12 is set to 1 so that FW will report correct device revision. Older FW versions won't be affected from turning on that bit, no capability bit is needed. Signed-off-by:
Yishai Hadas <yishaih@mellanox.com> Signed-off-by:
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Tariq Toukan authored
Conform the following warning: WARNING: ENOSYS means 'invalid syscall nr' and nothing else. Signed-off-by:
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Eric Dumazet authored
napi_complete_done() allows to opt-in for gro_flush_timeout, added back in linux-3.19, commit 3b47d303 ("net: gro: add a per device gro flush timer") This allows for more efficient GRO aggregation without sacrifying latencies. Signed-off-by:
Eric Dumazet <edumazet@google.com> Signed-off-by:
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Florian Fainelli authored
Add support for configuring classification rules using the ethtool::rxnfc API. This is useful to program the switch's CFP/TCAM to redirect specific packets to specific ports/queues for instance. For now, we allow any kind of IPv4 5-tuple matching. Signed-off-by:
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Florian Fainelli authored
Add Compact Field Processor definitions for the Broadcom Starfighter 2 and compatible versions of the switch. Signed-off-by:
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Florian Fainelli authored
By default, all traffic goes to queue 0, re-configure the traffic classes to quality of service mapping such that priority X maps to queue X, where X is from 0 through 7. Signed-off-by:
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Timur Tabi authored
The SGMII (internal PHY) can report decode errors via an interrupt. It can also report autonegotiation status changes, but we don't need to track those. The SGMII can recover automatically from most decode errors, so we only reset the interface if we get multiple consecutive errors. It's possible for bogus decode errors to be reported while the link is being brought up. The interrupt is registered when the interface is opened, and it's enabled after the link is up. Signed-off-by:
Timur Tabi <timur@codeaurora.org> Signed-off-by:
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Timur Tabi authored
The EMAC driver does not support wake-on-lan, but there is still code left-over that partially enables it. Remove that code and a few macros that support it. Signed-off-by:
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Timur Tabi authored
emac_mac_start() uses information from the external PHY to program the MAC, so it makes no sense to call it before the link is up. Signed-off-by:
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Timur Tabi authored
Regardless of how the external PHY is configured, the internal PHY (the "SGMII" block) is capable of configuring the SGMII link automatically. When the external PHY link comes up, regardless of how it is configured, the SGMII link is configured automatically. Signed-off-by:
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Timur Tabi authored
The PHY driver is attached only when the driver calls phy_connect_direct(). Calling phy_attached_print() to display information about the PHY driver prior to that point is meaningless. The interface can be brought down, a new PHY driver can be loaded, and the interface then brought back up. This is the correct time to display information about the attached driver. Since phy_attached_print() also prints information about the interrupt, that needs to be set as well. Signed-off-by:
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- Jan 29, 2017
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Vivien Didelot authored
Now that DSA exposes the bridge device pointer to which a port belongs, use it when programming the port based VLANs and thus remove the cache. Signed-off-by:
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Vivien Didelot authored
Now that DSA exposes the bridge device pointer to which a port belongs, use it when programming the port based VLANs and thus remove the cache. Signed-off-by:
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Vivien Didelot authored
Now that DSA exposes the bridge device pointer to which a port belongs, use it when programming the port based VLANs and thus remove the cache. Signed-off-by:
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Vivien Didelot authored
Upon reception of the NETDEV_CHANGEUPPER, a leaving port is already unbridged, so reflect this by assigning the port's bridge_dev pointer to NULL before calling the port_bridge_leave DSA driver operation. Now that the bridge_dev pointer is exposed to the drivers, reflecting the current state of the DSA switch fabric is necessary for the drivers to adjust their port based VLANs correctly. Pass the bridge device pointer to the port_bridge_leave operation so that drivers have all information to re-program their chips properly, and do not need to cache it anymore. Signed-off-by:
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Vivien Didelot authored
Change the ports[DSA_MAX_PORTS] array of the dsa_switch structure for a zero-length array, allocated at the same time as the dsa_switch structure itself. A dsa_switch_alloc() helper is provided for that. This commit brings no functional change yet since we pass DSA_MAX_PORTS as the number of ports for the moment. Future patches can update the DSA drivers separately to support dynamic number of ports. Signed-off-by:
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Geert Uytterhoeven authored
The limitation to 10/100Mbit speeds on R-Car Gen3 is valid for R-Car H3 ES1.0 only. Check for the exact SoC model to allow 1Gbps on newer revisions of R-Car H3, and on R-Car M3-W. Signed-off-by:
Simon Horman <horms+renesas@verge.net.au> Acked-by:
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Kazuya Mizuguchi authored
This patch enables tx and rx clock internal delay modes (TDM and RDM). This is to address a failure in the case of 1Gbps communication using the by salvator-x board with the KSZ9031RNX phy. This has been reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W) SoCs. With this change APSR internal delay modes are enabled for "rgmii-id", "rgmii-rxid" and "rgmii-txid" phy modes as follows: phy mode | ASPR delay mode -----------+---------------- rgmii-id | TDM and RDM rgmii-rxid | RDM rgmii-txid | TDM Signed-off-by:
Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com> Signed-off-by:
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Colin Ian King authored
The macro is returning ETIME which means various checks to see if the returned err is less than zero never work. I believe a -ETIME should be returned instead. Signed-off-by:
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Colin Ian King authored
The check on err < 0 is redundant and can be removed. Detected by CoverityScan, CID#1398318 ("Logically Dead Code") Signed-off-by:
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